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Commit 4803de58 by Eric Botcazou Committed by Eric Botcazou
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sparc.c (emit_scc_insn): Remove direct support for EQ and GEU in DImode if TARGET_SUBXC. 

	* config/sparc/sparc.c (emit_scc_insn): Remove direct support for EQ
	and GEU in DImode if TARGET_SUBXC.
	* config/sparc/sparc.md (seqdi<W:mode>_zero): Remove TARGET_SUBXC.
	(seqdi<W:mode>_zero_subxc): Delete.
	(neg_seqdi<W:mode>_zero): Remove TARGET_VIS3.
	(neg_seqdi<W:mode>_zero_vis3): Delete.
	(plus_seqdi<W:mode>_zero): Likewise.
	(minus_seqdi<W:mode>_zero): Likewise.
	(plus_plus_sltu<W:mode>): Accept only register.
	(addx<W:mode>): Likewise.
	(plus_sltu<W:mode>_vis3): Likewise.
	(plus_plus_sltu<W:mode>_vis3): Likewise.
	(neg_sgeu<W:mode>_vis3): Delete.
	(minus_sgeu<W:mode>_vis3): Likewise.
	(addxc<W:mode>): Accept only registers.
	(neg_sltu<W:mode>_subxc): Write %%g0 instead of 0.
	(minus_neg_sltu<W:mode>_subxc): Accept only register.
	(neg_plus_sltu<W:mode>_subxc): Likewise.
	(minus_sltu<W:mode>_subxc): Write %%g0 instead of 0.
	(minus_minus_sltu<W:mode>_subxc): Accept only register.
	(sgeu<W:mode>_insn_subxc): Delete.
	(plus_sgeu<W:mode>_subxc): Likewise.
	(subxc<W:mode>): Accept only register.
	(scc splitter): Split always GEU again.

From-SVN: r241012
parent 0a4613f0
Showing with 128 additions and 244 deletions
gcc/ChangeLog
2016-10-11 Eric Botcazou <ebotcazou@adacore.com>
* config/sparc/sparc.c (emit_scc_insn): Remove direct support for EQ
and GEU in DImode if TARGET_SUBXC.
* config/sparc/sparc.md (seqdi<W:mode>_zero): Remove TARGET_SUBXC.
(seqdi<W:mode>_zero_subxc): Delete.
(neg_seqdi<W:mode>_zero): Remove TARGET_VIS3.
(neg_seqdi<W:mode>_zero_vis3): Delete.
(plus_seqdi<W:mode>_zero): Likewise.
(minus_seqdi<W:mode>_zero): Likewise.
(plus_plus_sltu<W:mode>): Accept only register.
(addx<W:mode>): Likewise.
(plus_sltu<W:mode>_vis3): Likewise.
(plus_plus_sltu<W:mode>_vis3): Likewise.
(neg_sgeu<W:mode>_vis3): Delete.
(minus_sgeu<W:mode>_vis3): Likewise.
(addxc<W:mode>): Accept only registers.
(neg_sltu<W:mode>_subxc): Write %%g0 instead of 0.
(minus_neg_sltu<W:mode>_subxc): Accept only register.
(neg_plus_sltu<W:mode>_subxc): Likewise.
(minus_sltu<W:mode>_subxc): Write %%g0 instead of 0.
(minus_minus_sltu<W:mode>_subxc): Accept only register.
(sgeu<W:mode>_insn_subxc): Delete.
(plus_sgeu<W:mode>_subxc): Likewise.
(subxc<W:mode>): Accept only register.
(scc splitter): Split always GEU again.
2016-10-11 Jeff Law <law@redhat.com>
PR tree-optimization/77424
......
gcc/config/sparc/sparc.c
......@@ -3023,10 +3023,8 @@ emit_scc_insn (rtx operands[])
gen_rtx_fmt_ee (code, GET_MODE (operands[0]),
x, const0_rtx));
/* If we can use addx/subx or addxc/subxc, add a clobber for CC. */
if (mode == SImode
|| (code == NE && TARGET_VIS3)
|| (code == EQ && TARGET_SUBXC))
/* If we can use addx/subx or addxc, add a clobber for CC. */
if (mode == SImode || (code == NE && TARGET_VIS3))
{
rtx clobber
= gen_rtx_CLOBBER (VOIDmode,
......@@ -3039,12 +3037,10 @@ emit_scc_insn (rtx operands[])
return true;
}
/* We can do LTU in DImode using the addxc instruction with VIS3
and GEU in DImode using the subxc instruction with SUBXC. */
/* We can do LTU in DImode using the addxc instruction with VIS3. */
if (TARGET_ARCH64
&& mode == DImode
&& !((code == LTU || code == GTU) && TARGET_VIS3)
&& !((code == GEU || code == LEU) && TARGET_SUBXC)
&& gen_v9_scc (operands[0], code, x, y))
return true;
......
gcc/testsuite/ChangeLog
2016-10-11 Eric Botcazou <ebotcazou@adacore.com>
* gcc.target/sparc/setcc-4.c: Adjust.
* gcc.target/sparc/setcc-5.c: Likewise.
* gcc.target/sparc/setcc-6.c: Likewise.
* gcc.target/sparc/setcc-7.c: Likewise.
* gcc.target/sparc/setcc-8.c: Likewise.
* gcc.target/sparc/setcc-9.c: Likewise.
* gcc.target/sparc/setcc-10.c: Delete.
2016-10-11 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/77942
......
gcc/testsuite/gcc.target/sparc/setcc-10.c deleted 100644 → 0
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O1 -msubxc" } */
long foo2 (long a, long i)
{
return a - (i != 0);
}
long foo4 (long a, long b, long i)
{
return a - b - (i != 0);
}
long foo5 (long a, long i)
{
return a + (i == 0);
}
/* { dg-final { scan-assembler-times "subxc\t%" 3 } } */
/* { dg-final { scan-assembler-times "cmp\t%" 3 } } */
/* { dg-final { scan-assembler-not "add\t%" } } */
/* { dg-final { scan-assembler-not "sub\t%" } } */
gcc/testsuite/gcc.target/sparc/setcc-4.c
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O1 -msubxc" } */
/* { dg-options "-O1 -mno-vis3" } */
int eq (long a, long b)
long neq (long a, long b)
{
return a != b;
}
long eq (long a, long b)
{
return a == b;
}
int ge (unsigned long a, unsigned long b)
long lt (unsigned long a, unsigned long b)
{
return a >= b;
return a < b;
}
int le (unsigned long a, unsigned long b)
long leq (unsigned long a, unsigned long b)
{
return a <= b;
}
/* { dg-final { scan-assembler "xor\t%" } } */
/* { dg-final { scan-assembler-times "subxc\t%" 3 } } */
/* { dg-final { scan-assembler-times "cmp\t%" 3 } } */
long geq (unsigned long a, unsigned long b)
{
return a >= b;
}
long gt (unsigned long a, unsigned long b)
{
return a > b;
}
/* { dg-final { scan-assembler-times "xor\t%" 2 } } */
/* { dg-final { scan-assembler-times "cmp\t%" 4 } } */
/* { dg-final { scan-assembler-times "movrne\t%" 1 } } */
/* { dg-final { scan-assembler-times "movre\t%" 1 } } */
/* { dg-final { scan-assembler-times "movlu\t%" 1 } } */
/* { dg-final { scan-assembler-times "movleu\t%" 1 } } */
/* { dg-final { scan-assembler-times "movgeu\t%" 1 } } */
/* { dg-final { scan-assembler-times "movgu\t%" 1 } } */
/* { dg-final { scan-assembler-not "sra\t%" } } */
/* { dg-final { scan-assembler-not "and\t%" } } */
gcc/testsuite/gcc.target/sparc/setcc-5.c
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O1 -mno-vis3 -mno-subxc" } */
/* { dg-options "-O1 -mvis3" } */
long neq (long a, long b)
{
return a != b;
}
long eq (long a, long b)
{
return a == b;
}
long lt (unsigned long a, unsigned long b)
{
return a < b;
}
long leq (unsigned long a, unsigned long b)
{
return a <= b;
}
long geq (unsigned long a, unsigned long b)
{
return a >= b;
}
long gt (unsigned long a, unsigned long b)
{
return a > b;
}
/* { dg-final { scan-assembler-times "xor\t%" 2 } } */
/* { dg-final { scan-assembler-times "cmp\t%" 4 } } */
/* { dg-final { scan-assembler-times "movrne\t%" 1 } } */
/* { dg-final { scan-assembler-times "movre\t%" 1 } } */
/* { dg-final { scan-assembler-times "movlu\t%" 1 } } */
/* { dg-final { scan-assembler-times "movleu\t%" 1 } } */
/* { dg-final { scan-assembler-times "movgeu\t%" 1 } } */
/* { dg-final { scan-assembler-times "movgu\t%" 1 } } */
/* { dg-final { scan-assembler-times "xor\t%" 1 } } */
/* { dg-final { scan-assembler-times "cmp\t%" 3 } } */
/* { dg-final { scan-assembler-times "addxc\t%" 3 } } */
/* { dg-final { scan-assembler-not "sra\t%" } } */
/* { dg-final { scan-assembler-not "and\t%" } } */
gcc/testsuite/gcc.target/sparc/setcc-6.c
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O1 -mvis3 -msubxc" } */
/* { dg-options "-O1" } */
long neq (long a, long b)
int foo1 (int a, int i)
{
return a != b;
return a + (i != 0);
}
long eq (long a, long b)
int foo2 (int a, int i)
{
return a == b;
return a - (i != 0);
}
long lt (unsigned long a, unsigned long b)
int foo3 (int a, int b, int i)
{
return a < b;
return a + b + (i != 0);
}
long leq (unsigned long a, unsigned long b)
int foo4 (int a, int b, int i)
{
return a <= b;
return a - b - (i != 0);
}
long geq (unsigned long a, unsigned long b)
int foo5 (int a, int i)
{
return a >= b;
return a + (i == 0);
}
long gt (unsigned long a, unsigned long b)
int foo6 (int a, int i)
{
return a > b;
return a - (i == 0);
}
/* { dg-final { scan-assembler-times "xor\t%" 2 } } */
/* { dg-final { scan-assembler-times "addx\t%" 3 } } */
/* { dg-final { scan-assembler-times "subx\t%" 3 } } */
/* { dg-final { scan-assembler-times "cmp\t%" 6 } } */
/* { dg-final { scan-assembler-times "addxc\t%" 3 } } */
/* { dg-final { scan-assembler-times "subxc\t%" 3 } } */
/* { dg-final { scan-assembler-not "sra\t%" } } */
/* { dg-final { scan-assembler-not "and\t%" } } */
/* { dg-final { scan-assembler-not "add\t%" } } */
/* { dg-final { scan-assembler-not "sub\t%" } } */
gcc/testsuite/gcc.target/sparc/setcc-7.c
/* { dg-do compile } */
/* { dg-options "-O1" } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O1 -mno-vis3" } */
int foo1 (int a, int i)
long foo1 (long a, int i)
{
return a + (i != 0);
}
int foo2 (int a, int i)
long foo2 (long a, int i)
{
return a - (i != 0);
}
int foo3 (int a, int b, int i)
long foo3 (long a, long b, int i)
{
return a + b + (i != 0);
}
int foo4 (int a, int b, int i)
long foo4 (long a, long b, int i)
{
return a - b - (i != 0);
}
int foo5 (int a, int i)
long foo5 (long a, int i)
{
return a + (i == 0);
}
int foo6 (int a, int i)
long foo6 (long a, int i)
{
return a - (i == 0);
}
......
gcc/testsuite/gcc.target/sparc/setcc-8.c
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O1 -mno-vis3 -mno-subxc" } */
/* { dg-options "-O1 -mvis3" } */
long foo1 (long a, int i)
long foo1 (long a, long i)
{
return a + (i != 0);
}
long foo2 (long a, int i)
{
return a - (i != 0);
}
long foo3 (long a, long b, int i)
long foo3 (long a, long b, long i)
{
return a + b + (i != 0);
}
long foo4 (long a, long b, int i)
{
return a - b - (i != 0);
}
long foo5 (long a, int i)
{
return a + (i == 0);
}
long foo6 (long a, int i)
{
return a - (i == 0);
}
/* { dg-final { scan-assembler-times "addx\t%" 3 } } */
/* { dg-final { scan-assembler-times "subx\t%" 3 } } */
/* { dg-final { scan-assembler-times "cmp\t%" 6 } } */
/* { dg-final { scan-assembler-times "addxc\t%" 2 } } */
/* { dg-final { scan-assembler-times "cmp\t%" 2 } } */
/* { dg-final { scan-assembler-not "add\t%" } } */
/* { dg-final { scan-assembler-not "sub\t%" } } */
gcc/testsuite/gcc.target/sparc/setcc-9.c
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O1 -mvis3" } */
/* { dg-options "-O1 -msubxc" } */
long foo1 (long a, long i)
long foo2 (long a, long i)
{
return a + (i != 0);
return a - (i != 0);
}
long foo3 (long a, long b, long i)
long foo4 (long a, long b, long i)
{
return a + b + (i != 0);
return a - b - (i != 0);
}
long foo6 (long a, long i)
{
return a - (i == 0);
}
/* { dg-final { scan-assembler-times "addxc\t%" 3 } } */
/* { dg-final { scan-assembler-times "cmp\t%" 3 } } */
/* { dg-final { scan-assembler-not "add\t%" } } */
/* { dg-final { scan-assembler-times "subxc\t%" 2 } } */
/* { dg-final { scan-assembler-times "cmp\t%" 2 } } */
/* { dg-final { scan-assembler-not "sub\t%" } } */
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