(parallel inc/dec and branch-if-zero/nonzero): 4 new patterns.

From-SVN: r12968

gcc/config/i386/i386.md

@@ -5725,6 +5725,74 @@
   return AS1 (%J0,%l3);
 }")
 
+(define_insn ""
+  [(set (pc)
+	(if_then_else (ne (match_operand:SI 0 "general_operand" "g")
+			  (const_int 0))
+		      (label_ref (match_operand 1 "" ""))
+		      (pc)))
+   (set (match_dup 0)
+	(plus:SI (match_dup 0)
+		 (const_int -1)))]
+  ""
+  "*
+{
+  operands[2] = const1_rtx;
+  output_asm_insn (AS2 (sub%L0,%2,%0), operands);
+  return \"jnc %l1\";
+}")
+
+(define_insn ""
+  [(set (pc)
+	(if_then_else (eq (match_operand:SI 0 "general_operand" "g")
+			  (const_int 0))
+		      (label_ref (match_operand 1 "" ""))
+		      (pc)))
+   (set (match_dup 0)
+	(plus:SI (match_dup 0)
+		 (const_int -1)))]
+  ""
+  "*
+{
+  operands[2] = const1_rtx;
+  output_asm_insn (AS2 (sub%L0,%2,%0), operands);
+  return \"jc %l1\";
+}")
+
+(define_insn ""
+  [(set (pc)
+	(if_then_else (ne (match_operand:SI 0 "general_operand" "g")
+			  (const_int 0))
+		      (label_ref (match_operand 1 "" ""))
+		      (pc)))
+   (set (match_dup 0)
+	(plus:SI (match_dup 0)
+		 (const_int 1)))]
+  ""
+  "*
+{
+  operands[2] = const1_rtx;
+  output_asm_insn (AS2 (add%L0,%2,%0), operands);
+  return \"jnc %l1\";
+}")
+
+(define_insn ""
+  [(set (pc)
+	(if_then_else (eq (match_operand:SI 0 "general_operand" "g")
+			  (const_int 0))
+		      (label_ref (match_operand 1 "" ""))
+		      (pc)))
+   (set (match_dup 0)
+	(plus:SI (match_dup 0)
+		 (const_int 1)))]
+  ""
+  "*
+{
+  operands[2] = const1_rtx;
+  output_asm_insn (AS2 (add%L0,%2,%0), operands);
+  return \"jc %l1\";
+}")
+
 ;; Implement switch statements when generating PIC code.  Switches are
 ;; implemented by `tablejump' when not using -fpic.