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Commit 47d8cb23 by Claudiu Zissulescu Committed by Claudiu Zissulescu
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[ARC] Refurb eliminate regs. 

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

        * config/arc/arc.c (arc_hard_regno_modes): Add two missing modes
        for last two fake registers.
        (arc_conditional_register_usage): Make sure fake frame and arg
        pointer regs are in general regs class.
        (FRAME_POINTER_MASK): Remove.
        (RETURN_ADDR_MASK): Remove.
        (arc_must_save_register): Use hard frame regnum.
        (frame_restore_reg): Use hard_frame_pointer_rtx.
        (arc_save_callee_saves): Likewise.
        (arc_restore_callee_saves): Likewise.
        (arc_save_callee_enter): Likewise.
        (arc_restore_callee_leave): Likewise.
        (arc_save_callee_milli): Likewise.
        (arc_eh_return_address_location): Likewise.
        (arc_check_multi): Use hard frame regnum.
        (arc_can_eliminate): Likewise.
        * config/arc/arc.h (FIXED_REGISTERS): Make FP register available
        for register allocator.
        (REG_CLASS_CONTENTS): Update GENERAL_REGS.
        (REGNO_OK_FOR_BASE_P): Consider FRAME_POINTER_REGNUM.
        (FRAME_POINTER_REGNUM): Change it to a fake register.
        (HARD_FRAME_POINTER_REGNUM): Defined.
        (ARG_POINTER_REGNUM): Change it to a new fake register.
        (ELIMINABLE_REGS): Update.
        (REGISTER_NAMES): Update names.
        * config/arc/arc.md (LP_START): Remove.
        (LP_END): Likewise.
        (shift_si3_loop): Update pattern.

From-SVN: r270385
parent 1ec86e1e
Showing with 53 additions and 21 deletions
gcc/ChangeLog
2019-04-16 Claudiu Zissulescu <claziss@synopsys.com> 2019-04-16 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_hard_regno_modes): Add two missing modes
for last two fake registers.
(arc_conditional_register_usage): Make sure fake frame and arg
pointer regs are in general regs class.
(FRAME_POINTER_MASK): Remove.
(RETURN_ADDR_MASK): Remove.
(arc_must_save_register): Use hard frame regnum.
(frame_restore_reg): Use hard_frame_pointer_rtx.
(arc_save_callee_saves): Likewise.
(arc_restore_callee_saves): Likewise.
(arc_save_callee_enter): Likewise.
(arc_restore_callee_leave): Likewise.
(arc_save_callee_milli): Likewise.
(arc_eh_return_address_location): Likewise.
(arc_check_multi): Use hard frame regnum.
(arc_can_eliminate): Likewise.
* config/arc/arc.h (FIXED_REGISTERS): Make FP register available
for register allocator.
(REG_CLASS_CONTENTS): Update GENERAL_REGS.
(REGNO_OK_FOR_BASE_P): Consider FRAME_POINTER_REGNUM.
(FRAME_POINTER_REGNUM): Change it to a fake register.
(HARD_FRAME_POINTER_REGNUM): Defined.
(ARG_POINTER_REGNUM): Change it to a new fake register.
(ELIMINABLE_REGS): Update.
(REGISTER_NAMES): Update names.
* config/arc/arc.md (LP_START): Remove.
(LP_END): Likewise.
(shift_si3_loop): Update pattern.
2019-04-16 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_expand_prologue): Emit blockage regardless * config/arc/arc.c (arc_expand_prologue): Emit blockage regardless
to avoid delay slot scheduling. to avoid delay slot scheduling.
(arc_must_save_register): Don't save SP. (arc_must_save_register): Don't save SP.
......
gcc/config/arc/arc.h
...@@ -325,7 +325,7 @@ if (GET_MODE_CLASS (MODE) == MODE_INT \ ...@@ -325,7 +325,7 @@ if (GET_MODE_CLASS (MODE) == MODE_INT \
argument pointer. */ argument pointer. */
/* r63 is pc, r64-r127 = simd vregs, r128-r143 = simd dma config regs /* r63 is pc, r64-r127 = simd vregs, r128-r143 = simd dma config regs
r144, r145 = lp_start, lp_end r144, r145 = ARG_POINTER, FRAME_POINTER
and therefore the pseudo registers start from r146. */ and therefore the pseudo registers start from r146. */
#define FIRST_PSEUDO_REGISTER 146 #define FIRST_PSEUDO_REGISTER 146
...@@ -365,7 +365,7 @@ if (GET_MODE_CLASS (MODE) == MODE_INT \ ...@@ -365,7 +365,7 @@ if (GET_MODE_CLASS (MODE) == MODE_INT \
{ 0, 0, 0, 0, 0, 0, 0, 0, \ { 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 1, 1, 1, 1, 1, 1, \ 0, 0, 1, 0, 1, 1, 1, 1, \
\ \
1, 1, 1, 1, 1, 1, 1, 1, \ 1, 1, 1, 1, 1, 1, 1, 1, \
0, 0, 0, 0, 1, 1, 1, 1, \ 0, 0, 0, 0, 1, 1, 1, 1, \
...@@ -397,7 +397,7 @@ if (GET_MODE_CLASS (MODE) == MODE_INT \ ...@@ -397,7 +397,7 @@ if (GET_MODE_CLASS (MODE) == MODE_INT \
1, 1, 1, 1, 1, 1, 1, 1, \ 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 0, 0, 0, \ 1, 1, 1, 1, 1, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 1, 1, 1, 1, 1, 1, \ 0, 0, 1, 0, 1, 1, 1, 1, \
\ \
1, 1, 1, 1, 1, 1, 1, 1, \ 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, \ 1, 1, 1, 1, 1, 1, 1, 1, \
...@@ -532,10 +532,10 @@ enum reg_class ...@@ -532,10 +532,10 @@ enum reg_class
{0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, /* 'Rsd'. */ \ {0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, /* 'Rsd'. */ \
{0x0000000f, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, /* 'Rcd'. */ \ {0x0000000f, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, /* 'Rcd'. */ \
{0x0000f00f, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, /* 'q'. */ \ {0x0000f00f, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, /* 'q'. */ \
{0x1c001fff, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, /* 'Rsc'. */ \ {0x00001fff, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, /* 'Rsc'. */ \
{0x9fffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, /* 'h'. */ \ {0x9fffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, /* 'h'. */ \
{0x00000000, 0x00000f00, 0x00000000, 0x00000000, 0x00000000}, /* 'D'. */ \ {0x00000000, 0x00000f00, 0x00000000, 0x00000000, 0x00000000}, /* 'D'. */ \
{0xffffffff, 0x8fffffff, 0x00000000, 0x00000000, 0x00000000}, /* 'r'. */ \ {0xffffffff, 0x8fffffff, 0x00000000, 0x00000000, 0x00030000}, /* 'r'. */ \
{0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0x00000000}, /* 'v'. */ \ {0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0x00000000}, /* 'v'. */ \
{0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000ffff}, /* 'd'. */ \ {0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000ffff}, /* 'd'. */ \
{0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0003ffff} /* ALL_REGS. */\ {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0003ffff} /* ALL_REGS. */\
...@@ -583,11 +583,14 @@ extern enum reg_class arc_regno_reg_class[]; ...@@ -583,11 +583,14 @@ extern enum reg_class arc_regno_reg_class[];
Since they use reg_renumber, they are safe only once reg_renumber Since they use reg_renumber, they are safe only once reg_renumber
has been allocated, which happens in local-alloc.c. */ has been allocated, which happens in local-alloc.c. */
#define REGNO_OK_FOR_BASE_P(REGNO) \ #define REGNO_OK_FOR_BASE_P(REGNO) \
((REGNO) < 29 || ((REGNO) == ARG_POINTER_REGNUM) || ((REGNO) == 63) \ ((REGNO) < 29 \
|| ((REGNO) == ARG_POINTER_REGNUM) \
|| ((REGNO) == FRAME_POINTER_REGNUM) \
|| ((REGNO) == PCL_REG) \
|| ((unsigned) reg_renumber[REGNO] < 29) \ || ((unsigned) reg_renumber[REGNO] < 29) \
|| ((unsigned) (REGNO) == (unsigned) arc_tp_regno) \ || ((unsigned) (REGNO) == (unsigned) arc_tp_regno) \
|| (fixed_regs[REGNO] == 0 && IN_RANGE (REGNO, 32, 59)) \ || (fixed_regs[REGNO] == 0 && IN_RANGE (REGNO, 32, 59)) \
|| ((REGNO) == 30 && fixed_regs[REGNO] == 0)) || (fixed_regs[REGNO] == 0 && (REGNO) == R30_REG))
#define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO) #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)
...@@ -673,11 +676,12 @@ arc_return_addr_rtx(COUNT,FRAME) ...@@ -673,11 +676,12 @@ arc_return_addr_rtx(COUNT,FRAME)
#define STACK_POINTER_REGNUM 28 #define STACK_POINTER_REGNUM 28
/* Base register for access to local variables of the function. */ /* Base register for access to local variables of the function. */
#define FRAME_POINTER_REGNUM 27 #define FRAME_POINTER_REGNUM 145
#define HARD_FRAME_POINTER_REGNUM 27
/* Base register for access to arguments of the function. This register /* Base register for access to arguments of the function. This register
will be eliminated into either fp or sp. */ will be eliminated into either fp or sp. */
#define ARG_POINTER_REGNUM 62 #define ARG_POINTER_REGNUM 144
#define RETURN_ADDR_REGNUM 31 #define RETURN_ADDR_REGNUM 31
...@@ -787,8 +791,9 @@ arc_return_addr_rtx(COUNT,FRAME) ...@@ -787,8 +791,9 @@ arc_return_addr_rtx(COUNT,FRAME)
#define ELIMINABLE_REGS \ #define ELIMINABLE_REGS \
{{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
{FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
/* Define the offset between two registers, one to be eliminated, and the other /* Define the offset between two registers, one to be eliminated, and the other
its replacement, at the start of a routine. */ its replacement, at the start of a routine. */
...@@ -1182,7 +1187,7 @@ extern char rname56[], rname57[], rname58[], rname59[]; ...@@ -1182,7 +1187,7 @@ extern char rname56[], rname57[], rname58[], rname59[];
"r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", \ "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", \
"d1", "d1", "d2", "d2", "r44", "r45", "r46", "r47", \ "d1", "d1", "d2", "d2", "r44", "r45", "r46", "r47", \
"r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", \ "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", \
rname56,rname57,rname58,rname59,"lp_count", "cc", "ap", "pcl", \ rname56,rname57,rname58,rname59,"lp_count", "cc", "limm", "pcl", \
"vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7", \ "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7", \
"vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15", \ "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15", \
"vr16", "vr17", "vr18", "vr19", "vr20", "vr21", "vr22", "vr23", \ "vr16", "vr17", "vr18", "vr19", "vr20", "vr21", "vr22", "vr23", \
...@@ -1193,7 +1198,7 @@ extern char rname56[], rname57[], rname58[], rname59[]; ...@@ -1193,7 +1198,7 @@ extern char rname56[], rname57[], rname58[], rname59[];
"vr56", "vr57", "vr58", "vr59", "vr60", "vr61", "vr62", "vr63", \ "vr56", "vr57", "vr58", "vr59", "vr60", "vr61", "vr62", "vr63", \
"dr0", "dr1", "dr2", "dr3", "dr4", "dr5", "dr6", "dr7", \ "dr0", "dr1", "dr2", "dr3", "dr4", "dr5", "dr6", "dr7", \
"dr0", "dr1", "dr2", "dr3", "dr4", "dr5", "dr6", "dr7", \ "dr0", "dr1", "dr2", "dr3", "dr4", "dr5", "dr6", "dr7", \
"lp_start", "lp_end" \ "arg", "frame" \
} }
#define ADDITIONAL_REGISTER_NAMES \ #define ADDITIONAL_REGISTER_NAMES \
......
gcc/config/arc/arc.md
...@@ -201,8 +201,6 @@ ...@@ -201,8 +201,6 @@
(LP_COUNT 60) (LP_COUNT 60)
(CC_REG 61) (CC_REG 61)
(PCL_REG 63) (PCL_REG 63)
(LP_START 144)
(LP_END 145)
] ]
) )
...@@ -3466,8 +3464,6 @@ core_3, archs4x, archs4xd, archs4xd_slow" ...@@ -3466,8 +3464,6 @@ core_3, archs4x, archs4xd, archs4xd_slow"
(match_operand:SI 2 "nonmemory_operand" "rn,Cal")])) (match_operand:SI 2 "nonmemory_operand" "rn,Cal")]))
(clobber (match_scratch:SI 4 "=X,X")) (clobber (match_scratch:SI 4 "=X,X"))
(clobber (reg:SI LP_COUNT)) (clobber (reg:SI LP_COUNT))
(clobber (reg:SI LP_START))
(clobber (reg:SI LP_END))
(clobber (reg:CC CC_REG)) (clobber (reg:CC CC_REG))
] ]
"!TARGET_BARREL_SHIFTER" "!TARGET_BARREL_SHIFTER"
...@@ -6509,7 +6505,7 @@ core_3, archs4x, archs4xd, archs4xd_slow" ...@@ -6509,7 +6505,7 @@ core_3, archs4x, archs4xd, archs4xd_slow"
{ {
int len = XVECLEN (operands[0], 0); int len = XVECLEN (operands[0], 0);
rtx tmp = XVECEXP (operands[0], 0, len - 1); rtx tmp = XVECEXP (operands[0], 0, len - 1);
if (XEXP (tmp, 0) != frame_pointer_rtx) if (XEXP (tmp, 0) != hard_frame_pointer_rtx)
{ {
operands[3] = XEXP (tmp, 0); operands[3] = XEXP (tmp, 0);
gcc_assert (INTVAL (operands[1]) == INTVAL (operands[2])); gcc_assert (INTVAL (operands[1]) == INTVAL (operands[2]));
...@@ -6539,7 +6535,7 @@ core_3, archs4x, archs4xd, archs4xd_slow" ...@@ -6539,7 +6535,7 @@ core_3, archs4x, archs4xd, archs4xd_slow"
{ {
int len = XVECLEN (operands[0], 0); int len = XVECLEN (operands[0], 0);
rtx tmp = XVECEXP (operands[0], 0, len - 1); rtx tmp = XVECEXP (operands[0], 0, len - 1);
if (XEXP (tmp, 0) != frame_pointer_rtx) if (XEXP (tmp, 0) != hard_frame_pointer_rtx)
{ {
operands[3] = XEXP (tmp, 0); operands[3] = XEXP (tmp, 0);
gcc_assert (INTVAL (operands[1]) == INTVAL (operands[2])); gcc_assert (INTVAL (operands[1]) == INTVAL (operands[2]));
...@@ -6570,7 +6566,7 @@ core_3, archs4x, archs4xd, archs4xd_slow" ...@@ -6570,7 +6566,7 @@ core_3, archs4x, archs4xd, archs4xd_slow"
{ {
int len = XVECLEN (operands[0], 0); int len = XVECLEN (operands[0], 0);
rtx tmp = XVECEXP (operands[0], 0, len - 1); rtx tmp = XVECEXP (operands[0], 0, len - 1);
if (XEXP (tmp, 0) != frame_pointer_rtx) if (XEXP (tmp, 0) != hard_frame_pointer_rtx)
{ {
operands[3] = XEXP (tmp, 0); operands[3] = XEXP (tmp, 0);
gcc_assert (INTVAL (operands[1]) == INTVAL (operands[2])); gcc_assert (INTVAL (operands[1]) == INTVAL (operands[2]));
...@@ -6601,7 +6597,7 @@ core_3, archs4x, archs4xd, archs4xd_slow" ...@@ -6601,7 +6597,7 @@ core_3, archs4x, archs4xd, archs4xd_slow"
{ {
int len = XVECLEN (operands[0], 0); int len = XVECLEN (operands[0], 0);
rtx tmp = XVECEXP (operands[0], 0, len - 1); rtx tmp = XVECEXP (operands[0], 0, len - 1);
if (XEXP (tmp, 0) != frame_pointer_rtx) if (XEXP (tmp, 0) != hard_frame_pointer_rtx)
{ {
operands[3] = XEXP (tmp, 0); operands[3] = XEXP (tmp, 0);
gcc_assert (INTVAL (operands[1]) == INTVAL (operands[2])); gcc_assert (INTVAL (operands[1]) == INTVAL (operands[2]));
......
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