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lvzhengyang
riscv-gcc-1
Commits
479f2cea
Commit
479f2cea
authored
Aug 01, 2002
by
Richard Sandiford
Committed by
Richard Sandiford
Aug 01, 2002
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* config/mips/mips.md: Add [!]TARGET_MIPS16 to sgtu conditions.
From-SVN: r55943
parent
7662da2f
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gcc/ChangeLog
View file @
479f2cea
2002-08-01 Richard Sandiford <rsandifo@redhat.com>
* config/mips/mips.md: Add [!]TARGET_MIPS16 to sgtu conditions.
2002-08-01 Zdenek Dvorak <rakdver@atrey.karlin.mff.cuni.cz>
* gcse.c (expr_hash_table_size, n_exprs, set_hash_table_size,
...
...
gcc/config/mips/mips.md
View file @
479f2cea
...
...
@@ -8823,7 +8823,7 @@ move\\t%0,%z4\\n\\
[(set (match_operand:SI 0 "register_operand" "=d")
(gtu:SI (match_operand:SI 1 "register_operand" "d")
(match_operand:SI 2 "reg_or_0_operand" "dJ")))]
""
"
!TARGET_MIPS16
"
"sltu\\t%0,%z2,%1"
[(set_attr "type" "arith")
(set_attr "mode" "SI")])
...
...
@@ -8832,7 +8832,7 @@ move\\t%0,%z4\\n\\
[(set (match_operand:SI 0 "register_operand" "=t")
(gtu:SI (match_operand:SI 1 "register_operand" "d")
(match_operand:SI 2 "register_operand" "d")))]
""
"
TARGET_MIPS16
"
"sltu\\t%2,%1"
[(set_attr "type" "arith")
(set_attr "mode" "SI")])
...
...
@@ -8841,7 +8841,7 @@ move\\t%0,%z4\\n\\
[(set (match_operand:DI 0 "register_operand" "=d")
(gtu:DI (match_operand:DI 1 "se_register_operand" "d")
(match_operand:DI 2 "se_reg_or_0_operand" "dJ")))]
"TARGET_64BIT"
"TARGET_64BIT
&& !TARGET_MIPS16
"
"sltu\\t%0,%z2,%1"
[(set_attr "type" "arith")
(set_attr "mode" "DI")])
...
...
@@ -8850,7 +8850,7 @@ move\\t%0,%z4\\n\\
[(set (match_operand:DI 0 "register_operand" "=t")
(gtu:DI (match_operand:DI 1 "se_register_operand" "d")
(match_operand:DI 2 "se_register_operand" "d")))]
"TARGET_64BIT"
"TARGET_64BIT
&& TARGET_MIPS16
"
"sltu\\t%2,%1"
[(set_attr "type" "arith")
(set_attr "mode" "DI")])
...
...
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