Only allow allow rotations by a constant amount.

Do not generate ROTL instruction.

From-SVN: r35797

gcc/ChangeLog

+2000-08-18  Ray Essick <essick@ddna.labs.mot.com> & Nick Clifton  <nickc@redhat.com>
+
+	* config/mcore/mcore.md (rotlsi3): Allow allow rotations by a
+	constant amount.  Do not generate ROTL instruction.
+
 Fri Aug 18 16:22:20 2000  Alexandre Oliva  <aoliva@redhat.com>
 
 	* config/sh/elf.h: Do not include sh/sh.h.

gcc/config/mcore/mcore.md

@@ -505,15 +505,25 @@
 ;; Shifts and rotates
 ;; -------------------------------------------------------------------------
 
-;;; ??? The reg case may never match.
-(define_insn "rotlsi3"
-  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r,r")
-	(rotate:SI (match_operand:SI 1 "mcore_arith_reg_operand" "0,0")
-		     (match_operand:SI 2 "mcore_arith_K_operand_not_0" "r,K")))]
+;; Only allow these if the shift count is a convenient constant.
+(define_expand "rotlsi3"
+  [(set (match_operand:SI            0 "mcore_arith_reg_operand" "")
+	(rotate:SI (match_operand:SI 1 "mcore_arith_reg_operand" "")
+		   (match_operand:SI 2 "nonmemory_operand" "")))]
+  ""
+  "if (! mcore_literal_K_operand (operands[2], SImode))
+	 FAIL;
+  ")
+
+;; We can only do constant rotates, which is what this pattern provides.
+;; The combiner will put it together for us when we do:
+;;	(x << N) | (x >> (32 - N))
+(define_insn ""
+  [(set (match_operand:SI              0 "mcore_arith_reg_operand" "=r")
+	(rotate:SI (match_operand:SI   1 "mcore_arith_reg_operand"  "0")
+		     (match_operand:SI 2 "mcore_literal_K_operand"  "K")))]
   ""
-  "@
-	rotl	%0,%2
-	rotli	%0,%2"
+  "rotli	%0,%2"
   [(set_attr "type" "shift")])
 
 (define_insn "ashlsi3"