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Commit 47747e53 by Richard Henderson Committed by Richard Henderson
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alpha.md: Revert Oct 27 change... 

* alpha.md: Revert Oct 27 change, as it is superceeded by Kenner's
Nov 8 find_replacement change.  Move decls of get_unaligned_address
* alpha.h: ... here.

From-SVN: r19216
parent 7940255d
Showing with 30 additions and 88 deletions
gcc/ChangeLog
Tue Apr 14 23:39:13 1998 Richard Henderson <rth@cygnus.com>
* alpha.md: Revert Oct 27 change, as it is superceeded by Kenner's
Nov 8 find_replacement change. Move decls of get_unaligned_address
* alpha.h: ... here.
Tue Apr 14 22:00:39 1998 John Carr <jfc@mit.edu>
* function.c (assign_parms): Initialize unsignedp before passing
......
gcc/config/alpha/alpha.h
......@@ -2378,3 +2378,7 @@ do { \
/* The system headers under Alpha systems are generally C++-aware. */
#define NO_IMPLICIT_EXTERN_C
/* Prototypes for alpha.c functions used in the md file. */
extern struct rtx_def *get_unaligned_address ();
gcc/config/alpha/alpha.md
......@@ -1321,8 +1321,7 @@
(const_int 56)))]
""
"
{ extern rtx get_unaligned_address ();
{
if (TARGET_BWX)
{
emit_insn (gen_extendqidi2x (operands[0],
......@@ -1387,8 +1386,7 @@
(const_int 48)))]
""
"
{ extern rtx get_unaligned_address ();
{
if (TARGET_BWX)
{
emit_insn (gen_extendhidi2x (operands[0],
......@@ -4487,8 +4485,7 @@
(match_operand:QI 1 "general_operand" ""))]
""
"
{ extern rtx get_unaligned_address ();
{
if (TARGET_BWX)
{
if (GET_CODE (operands[0]) == MEM
......@@ -4532,18 +4529,6 @@
? gen_rtx_REG (SImode, REGNO (operands[0]))
: gen_reg_rtx (SImode));
/* ??? This code creates a new MEM rtx. If we were called during
reload, then we must be careful to make sure that the new rtx
will not need reloading. */
if (reload_in_progress
&& GET_CODE (operands[1]) == MEM
&& ! strict_memory_address_p (SImode, XEXP (operands[1], 0)))
{
rtx tmp = gen_rtx_REG (Pmode, REGNO (operands[0]));
emit_insn (gen_move_insn (tmp, XEXP (operands[1], 0)));
XEXP (operands[1], 0) = tmp;
}
get_aligned_mem (operands[1], &aligned_mem, &bitnum);
emit_insn (gen_aligned_loadqi (operands[0], aligned_mem, bitnum,
......@@ -4611,8 +4596,7 @@
(match_operand:HI 1 "general_operand" ""))]
""
"
{ extern rtx get_unaligned_address ();
{
if (TARGET_BWX)
{
if (GET_CODE (operands[0]) == MEM
......@@ -4656,18 +4640,6 @@
? gen_rtx_REG (SImode, REGNO (operands[0]))
: gen_reg_rtx (SImode));
/* ??? This code creates a new MEM rtx. If we were called during
reload, then we must be careful to make sure that the new rtx
will not need reloading. */
if (reload_in_progress
&& GET_CODE (operands[1]) == MEM
&& ! strict_memory_address_p (SImode, XEXP (operands[1], 0)))
{
rtx tmp = gen_rtx_REG (Pmode, REGNO (operands[0]));
emit_insn (gen_move_insn (tmp, XEXP (operands[1], 0)));
XEXP (operands[1], 0) = tmp;
}
get_aligned_mem (operands[1], &aligned_mem, &bitnum);
emit_insn (gen_aligned_loadhi (operands[0], aligned_mem, bitnum,
......@@ -4741,28 +4713,18 @@
(match_operand:TI 2 "register_operand" "=&r")])]
"! TARGET_BWX"
"
{ extern rtx get_unaligned_address ();
rtx addr, scratch, seq, tmp;
{
rtx addr = get_unaligned_address (operands[1], 0);
/* It is possible that one of the registers we got for operands[2]
might coincide with that of operands[0] (which is why we made
it TImode). Pick the other one to use as our scratch. */
scratch = gen_rtx_REG (DImode,
REGNO (operands[0]) == REGNO (operands[2])
? REGNO (operands[2]) + 1 : REGNO (operands[2]));
/* We must be careful to make sure that the new rtx won't need reloading. */
if (GET_CODE (operands[1]) == MEM &&
! strict_memory_address_p (DImode, XEXP (operands[1], 0)))
{
tmp = gen_rtx_REG (Pmode, REGNO (operands[0]));
emit_insn (gen_move_insn (tmp, XEXP (operands[1], 0)));
XEXP (operands[1], 0) = tmp;
}
addr = get_unaligned_address (operands[1], 0);
rtx scratch = gen_rtx_REG (DImode,
REGNO (operands[0]) == REGNO (operands[2])
? REGNO (operands[2]) + 1 : REGNO (operands[2]));
seq = gen_unaligned_loadqi (operands[0], addr, scratch,
gen_rtx_REG (DImode, REGNO (operands[0])));
rtx seq = gen_unaligned_loadqi (operands[0], addr, scratch,
gen_rtx_REG (DImode, REGNO (operands[0])));
alpha_set_memflags (seq, operands[1]);
emit_insn (seq);
......@@ -4775,28 +4737,18 @@
(match_operand:TI 2 "register_operand" "=&r")])]
"! TARGET_BWX"
"
{ extern rtx get_unaligned_address ();
rtx scratch, seq, tmp, addr;
{
rtx addr = get_unaligned_address (operands[1], 0);
/* It is possible that one of the registers we got for operands[2]
might coincide with that of operands[0] (which is why we made
it TImode). Pick the other one to use as our scratch. */
scratch = gen_rtx_REG (DImode,
REGNO (operands[0]) == REGNO (operands[2])
? REGNO (operands[2]) + 1 : REGNO (operands[2]));
/* We must be careful to make sure that the new rtx won't need reloading. */
if (GET_CODE (operands[1]) == MEM &&
! strict_memory_address_p (DImode, XEXP (operands[1], 0)))
{
tmp = gen_rtx_REG (Pmode, REGNO (operands[0]));
emit_insn (gen_move_insn (tmp, XEXP (operands[1], 0)));
XEXP (operands[1], 0) = tmp;
}
addr = get_unaligned_address (operands[1], 0);
rtx scratch = gen_rtx_REG (DImode,
REGNO (operands[0]) == REGNO (operands[2])
? REGNO (operands[2]) + 1 : REGNO (operands[2]));
seq = gen_unaligned_loadhi (operands[0], addr, scratch,
gen_rtx_REG (DImode, REGNO (operands[0])));
rtx seq = gen_unaligned_loadhi (operands[0], addr, scratch,
gen_rtx_REG (DImode, REGNO (operands[0])));
alpha_set_memflags (seq, operands[1]);
emit_insn (seq);
......@@ -4809,17 +4761,7 @@
(match_operand:TI 2 "register_operand" "=&r")])]
"! TARGET_BWX"
"
{ extern rtx get_unaligned_address ();
/* Note that any_memory_operand allows pseudos during reload. */
if (GET_CODE (operands[0]) == MEM &&
! strict_memory_address_p (DImode, XEXP (operands[0], 0)))
{
rtx scratch1 = gen_rtx_REG (DImode, REGNO (operands[2]));
emit_insn (gen_move_insn (scratch1, XEXP (operands[0], 0)));
XEXP (operands[0], 0) = scratch1;
}
{
if (aligned_memory_operand (operands[0], QImode))
{
rtx aligned_mem, bitnum;
......@@ -4857,17 +4799,7 @@
(match_operand:TI 2 "register_operand" "=&r")])]
"! TARGET_BWX"
"
{ extern rtx get_unaligned_address ();
/* Note that any_memory_operand allows pseudos during reload. */
if (GET_CODE (operands[0]) == MEM &&
! strict_memory_address_p (DImode, XEXP (operands[0], 0)))
{
rtx scratch1 = gen_rtx_REG (DImode, REGNO (operands[2]));
emit_insn (gen_move_insn (scratch1, XEXP (operands[0], 0)));
XEXP (operands[0], 0) = scratch1;
}
{
if (aligned_memory_operand (operands[0], HImode))
{
rtx aligned_mem, bitnum;
......
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