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riscv-gcc-1
Commit 45e87b24 by Richard Biener Committed by Richard Biener
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x86-tune-costs.h (znver1_cost): Make AVX256 vector loads cost the same as AVX128 ones. 

2018-10-08  Richard Biener  <rguenther@suse.de>

	* config/i386/x86-tune-costs.h (znver1_cost): Make AVX256 vector loads
	cost the same as AVX128 ones.

From-SVN: r264934
parent 3cbb7cbb
Showing with 7 additions and 2 deletions
gcc/ChangeLog
2018-10-08 Richard Biener <rguenther@suse.de>
* config/i386/x86-tune-costs.h (znver1_cost): Make AVX256 vector loads
cost the same as AVX128 ones.
2018-10-08 Paul Koning <ni1d@arrl.net>
* config/pdp11/pdp11-protos.h (output_block_move): Remove.
gcc/config/i386/x86-tune-costs.h
......@@ -1518,9 +1518,9 @@ struct processor_costs znver1_cost = {
{8, 8}, /* cost of storing MMX registers
in SImode and DImode. */
2, 3, 6, /* cost of moving XMM,YMM,ZMM register. */
{6, 6, 6, 10, 20}, /* cost of loading SSE registers
{6, 6, 6, 6, 12}, /* cost of loading SSE registers
in 32,64,128,256 and 512-bit. */
{6, 6, 6, 10, 20}, /* cost of unaligned loads. */
{6, 6, 6, 6, 12}, /* cost of unaligned loads. */
{8, 8, 8, 8, 16}, /* cost of storing SSE registers
in 32,64,128,256 and 512-bit. */
{8, 8, 8, 8, 16}, /* cost of unaligned stores. */
......
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