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Commit 458c00ff by Uros Bizjak
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i386.md (float<SSEMODEI24:mode><X87MODEF:mode>2): Use explicit gen_truncxfsf2… 

i386.md (float<SSEMODEI24:mode><X87MODEF:mode>2): Use explicit gen_truncxfsf2 and gen_truncxfdf2 references to avoid reference to...

	* config/i386/i386.md (float<SSEMODEI24:mode><X87MODEF:mode>2):
	Use explicit gen_truncxfsf2 and gen_truncxfdf2 references to avoid
	reference to nonexistent gen_truncxfxf2 function.

From-SVN: r152497
parent d2407a7a
Showing with 90 additions and 74 deletions
gcc/ChangeLog
2009-10-06 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (SWI48, SDWI, DWI): New mode iterators.
* config/i386/i386.md (float<SSEMODEI24:mode><X87MODEF:mode>2):
Use explicit gen_truncxfsf2 and gen_truncxfdf2 references to avoid
reference to nonexistent gen_truncxfxf2 function.
2009-10-06 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (SWI48, SDWIM, DWI): New mode iterators.
(DWIH, g, di, doubleint_general_operand): New mode attributes.
(general_operand): Handle TI mode.
(add<mode>3): Macroize expander from add{qi,hi,si,di,ti}3 patterns
using SDWI mode iterator.
using SDWIM mode iterator.
(*add<mode>3_doubleword): New insn_and_split pattern. Macroize
pattern from *add{di,ti}3_1 patterns and corresponding splitters
using SDWI mode iterator.
using DWI mode iterator.
(add<mode>3_carry): Macroize insn from add{qi,hi,si,di}3_carry
patterns using SWI mode iterator.
(*add<mode>3_cc): Macroize insn from add{si,di}3_cc patterns
......@@ -17,10 +23,10 @@
(*add<mode>_3): Ditto from add{si,di}_3 patterns.
(*add<mode>_5): Ditto from add{si,di}_5 patterns.
(sub<mode>3): Macroize expander from sub{qi,hi,si,di,ti}3 patterns
using SDWI mode iterator.
using SDWIM mode iterator.
(*sub<mode>3_doubleword): New insn_and_split pattern. Macroize
pattern from *sub{di,ti}3_1 patterns and corresponding splitters
using SDWI mode iterator.
using DWI mode iterator.
(sub<mode>3_carry): Macroize insn from sub{qi,hi,si,di}3_carry
patterns using SWI mode iterator.
(*sub<mode>_1): Ditto from from sub{qi,hi,si,di}_1 patterns.
......@@ -268,7 +274,7 @@
Richard Guenther <rguenther@suse.de>
Jan Hubicka <jh@suse.cz>
Doug Kwan <dougkwan@google.com>
H.J. Lu <hongjiu.lu@intel.com>
H.J. Lu <hongjiu.lu@intel.com>
Bill Maddox <maddox@google.com>
Ryan Mansfield <rmansfield@qnx.com>
Diego Novillo <dnovillo@google.com>
......@@ -804,23 +810,24 @@
2009-10-02 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (divmod<mode>4) Macroize expander from
divmoddi4, divmodsi4 and divmodhi4 patterns using SWI248 macro.
* config/i386/i386.md (SWIM248): New mode iterator.
(divmod<mode>4) Macroize expander from divmoddi4, divmodsi4 and
divmodhi4 patterns using SWIM248 macro.
(*divmod<mode>4): Macroize insn_and_split pattern from
*divmoddi4_cltd_rex64, *divmodsi4_cltd and divmodhi4 insn patterns
and their corresponding splitters usign SWI248 macro. Split SImode
and their corresponding splitters usign SWIM248 macro. Split SImode
insn to generate cltd and DImode insn to generate cqto instead of
move+shift when optimizing for size or TARGET_USE_CLTD is in effect.
(*divmoddi4_nocltd_rex64, *divmodsi4_nocltd): Remove insn patterns.
(*divmod<mode>4_noext): Macroize insn from *divmoddi_noext_rex64 and
*divmodsi_noext patterns using SWI248 macro.
*divmodsi_noext patterns using SWIM248 macro.
(udivmod<mode>4): Macroize expander from udivmoddi4, udivmodsi4 and
udivmodhi4 patterns using SWI248 macro.
udivmodhi4 patterns using SWIM248 macro.
(*udivmod<mode>4): Macroize insn_and_split pattern from
*udivmoddi4, udivmodsi4 and udivmodhi4 patterns and their
corresponding splitters using SWI248 macro.
corresponding splitters using SWIM248 macro.
(*udivmod<mode>4_noext): Macroize insn from *udivmoddi4_noext,
*udivmodsi4_noext and *udivmodhi_noext patterns using SWI248 macro.
*udivmodsi4_noext and *udivmodhi_noext patterns using SWIM248 macro.
2009-10-02 Eric Botcazou <ebotcazou@adacore.com>
gcc/config/i386/i386.md
......@@ -711,12 +711,14 @@
;; Single word integer modes without QImode and HImode.
(define_mode_iterator SWI48 [SI (DI "TARGET_64BIT")])
;; All single and double word integer modes.
(define_mode_iterator SDWI [(QI "TARGET_QIMODE_MATH")
(HI "TARGET_HIMODE_MATH")
SI
DI
(TI "TARGET_64BIT")])
;; All math-dependant single and double word integer modes.
(define_mode_iterator SDWIM [(QI "TARGET_QIMODE_MATH")
(HI "TARGET_HIMODE_MATH")
SI DI (TI "TARGET_64BIT")])
;; Math-dependant single word integer modes without QImode.
(define_mode_iterator SWIM248 [(HI "TARGET_HIMODE_MATH")
SI (DI "TARGET_64BIT")])
;; Double word integer modes.
(define_mode_iterator DWI [(DI "!TARGET_64BIT")
......@@ -5454,11 +5456,18 @@
&& !X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SSEMODEI24:MODE>mode))
{
rtx reg = gen_reg_rtx (XFmode);
rtx insn;
emit_insn (gen_float<SSEMODEI24:mode>xf2 (reg, operands[1]));
/* Avoid references to nonexistent function in dead code in XFmode case. */
#define gen_truncxfxf2 gen_truncxfdf2
emit_insn (gen_truncxf<X87MODEF:mode>2 (operands[0], reg));
#undef gen_truncxfxf2
if (<X87MODEF:MODE>mode == SFmode)
insn = gen_truncxfsf2 (operands[0], reg);
else if (<X87MODEF:MODE>mode == DFmode)
insn = gen_truncxfdf2 (operands[0], reg);
else
gcc_unreachable ();
emit_insn (insn);
DONE;
}
}")
......@@ -6075,9 +6084,9 @@
;; Add instructions
(define_expand "add<mode>3"
[(set (match_operand:SDWI 0 "nonimmediate_operand" "")
(plus:SDWI (match_operand:SDWI 1 "nonimmediate_operand" "")
(match_operand:SDWI 2 "<general_operand>" "")))]
[(set (match_operand:SDWIM 0 "nonimmediate_operand" "")
(plus:SDWIM (match_operand:SDWIM 1 "nonimmediate_operand" "")
(match_operand:SDWIM 2 "<general_operand>" "")))]
""
"ix86_expand_binary_operator (PLUS, <MODE>mode, operands); DONE;")
......@@ -7609,9 +7618,9 @@
;; Subtract instructions
(define_expand "sub<mode>3"
[(set (match_operand:SDWI 0 "nonimmediate_operand" "")
(minus:SDWI (match_operand:SDWI 1 "nonimmediate_operand" "")
(match_operand:SDWI 2 "<general_operand>" "")))]
[(set (match_operand:SDWIM 0 "nonimmediate_operand" "")
(minus:SDWIM (match_operand:SDWIM 1 "nonimmediate_operand" "")
(match_operand:SDWIM 2 "<general_operand>" "")))]
""
"ix86_expand_binary_operator (MINUS, <MODE>mode, operands); DONE;")
......@@ -8431,33 +8440,33 @@
;; Divmod instructions.
(define_expand "divmod<mode>4"
[(parallel [(set (match_operand:SWI248 0 "register_operand" "")
(div:SWI248
(match_operand:SWI248 1 "register_operand" "")
(match_operand:SWI248 2 "nonimmediate_operand" "")))
(set (match_operand:SWI248 3 "register_operand" "")
(mod:SWI248 (match_dup 1) (match_dup 2)))
[(parallel [(set (match_operand:SWIM248 0 "register_operand" "")
(div:SWIM248
(match_operand:SWIM248 1 "register_operand" "")
(match_operand:SWIM248 2 "nonimmediate_operand" "")))
(set (match_operand:SWIM248 3 "register_operand" "")
(mod:SWIM248 (match_dup 1) (match_dup 2)))
(clobber (reg:CC FLAGS_REG))])]
"(<MODE>mode != HImode) || TARGET_HIMODE_MATH"
""
"")
(define_insn_and_split "*divmod<mode>4"
[(set (match_operand:SWI248 0 "register_operand" "=a")
(div:SWI248 (match_operand:SWI248 2 "register_operand" "0")
(match_operand:SWI248 3 "nonimmediate_operand" "rm")))
(set (match_operand:SWI248 1 "register_operand" "=&d")
(mod:SWI248 (match_dup 2) (match_dup 3)))
[(set (match_operand:SWIM248 0 "register_operand" "=a")
(div:SWIM248 (match_operand:SWIM248 2 "register_operand" "0")
(match_operand:SWIM248 3 "nonimmediate_operand" "rm")))
(set (match_operand:SWIM248 1 "register_operand" "=&d")
(mod:SWIM248 (match_dup 2) (match_dup 3)))
(clobber (reg:CC FLAGS_REG))]
"(<MODE>mode != HImode) || TARGET_HIMODE_MATH"
""
"#"
"&& reload_completed"
[(parallel [(set (match_dup 1)
(ashiftrt:SWI248 (match_dup 4) (match_dup 5)))
(ashiftrt:SWIM248 (match_dup 4) (match_dup 5)))
(clobber (reg:CC FLAGS_REG))])
(parallel [(set (match_dup 0)
(div:SWI248 (match_dup 2) (match_dup 3)))
(div:SWIM248 (match_dup 2) (match_dup 3)))
(set (match_dup 1)
(mod:SWI248 (match_dup 2) (match_dup 3)))
(mod:SWIM248 (match_dup 2) (match_dup 3)))
(use (match_dup 1))
(clobber (reg:CC FLAGS_REG))])]
{
......@@ -8477,12 +8486,12 @@
(set_attr "mode" "<MODE>")])
(define_insn "*divmod<mode>4_noext"
[(set (match_operand:SWI248 0 "register_operand" "=a")
(div:SWI248 (match_operand:SWI248 2 "register_operand" "0")
(match_operand:SWI248 3 "nonimmediate_operand" "rm")))
(set (match_operand:SWI248 1 "register_operand" "=d")
(mod:SWI248 (match_dup 2) (match_dup 3)))
(use (match_operand:SWI248 4 "register_operand" "1"))
[(set (match_operand:SWIM248 0 "register_operand" "=a")
(div:SWIM248 (match_operand:SWIM248 2 "register_operand" "0")
(match_operand:SWIM248 3 "nonimmediate_operand" "rm")))
(set (match_operand:SWIM248 1 "register_operand" "=d")
(mod:SWIM248 (match_dup 2) (match_dup 3)))
(use (match_operand:SWIM248 4 "register_operand" "1"))
(clobber (reg:CC FLAGS_REG))]
""
"idiv{<imodesuffix>}\t%3"
......@@ -8490,31 +8499,31 @@
(set_attr "mode" "<MODE>")])
(define_expand "udivmod<mode>4"
[(parallel [(set (match_operand:SWI248 0 "register_operand" "")
(udiv:SWI248
(match_operand:SWI248 1 "register_operand" "")
(match_operand:SWI248 2 "nonimmediate_operand" "")))
(set (match_operand:SWI248 3 "register_operand" "")
(umod:SWI248 (match_dup 1) (match_dup 2)))
[(parallel [(set (match_operand:SWIM248 0 "register_operand" "")
(udiv:SWIM248
(match_operand:SWIM248 1 "register_operand" "")
(match_operand:SWIM248 2 "nonimmediate_operand" "")))
(set (match_operand:SWIM248 3 "register_operand" "")
(umod:SWIM248 (match_dup 1) (match_dup 2)))
(clobber (reg:CC FLAGS_REG))])]
"(<MODE>mode != HImode) || TARGET_HIMODE_MATH"
""
"")
(define_insn_and_split "*udivmod<mode>4"
[(set (match_operand:SWI248 0 "register_operand" "=a")
(udiv:SWI248 (match_operand:SWI248 2 "register_operand" "0")
(match_operand:SWI248 3 "nonimmediate_operand" "rm")))
(set (match_operand:SWI248 1 "register_operand" "=&d")
(umod:SWI248 (match_dup 2) (match_dup 3)))
[(set (match_operand:SWIM248 0 "register_operand" "=a")
(udiv:SWIM248 (match_operand:SWIM248 2 "register_operand" "0")
(match_operand:SWIM248 3 "nonimmediate_operand" "rm")))
(set (match_operand:SWIM248 1 "register_operand" "=&d")
(umod:SWIM248 (match_dup 2) (match_dup 3)))
(clobber (reg:CC FLAGS_REG))]
"(<MODE>mode != HImode) || TARGET_HIMODE_MATH"
""
"#"
"&& reload_completed"
[(set (match_dup 1) (const_int 0))
(parallel [(set (match_dup 0)
(udiv:SWI248 (match_dup 2) (match_dup 3)))
(udiv:SWIM248 (match_dup 2) (match_dup 3)))
(set (match_dup 1)
(umod:SWI248 (match_dup 2) (match_dup 3)))
(umod:SWIM248 (match_dup 2) (match_dup 3)))
(use (match_dup 1))
(clobber (reg:CC FLAGS_REG))])]
""
......@@ -8522,14 +8531,14 @@
(set_attr "mode" "<MODE>")])
(define_insn "*udivmod<mode>4_noext"
[(set (match_operand:SWI248 0 "register_operand" "=a")
(udiv:SWI248 (match_operand:SWI248 2 "register_operand" "0")
(match_operand:SWI248 3 "nonimmediate_operand" "rm")))
(set (match_operand:SWI248 1 "register_operand" "=d")
(umod:SWI248 (match_dup 2) (match_dup 3)))
(use (match_operand:SWI248 4 "register_operand" "1"))
(clobber (reg:CC FLAGS_REG))]
"(<MODE>mode != HImode) || TARGET_HIMODE_MATH"
[(set (match_operand:SWIM248 0 "register_operand" "=a")
(udiv:SWIM248 (match_operand:SWIM248 2 "register_operand" "0")
(match_operand:SWIM248 3 "nonimmediate_operand" "rm")))
(set (match_operand:SWIM248 1 "register_operand" "=d")
(umod:SWIM248 (match_dup 2) (match_dup 3)))
(use (match_operand:SWIM248 4 "register_operand" "1"))
(clobber (reg:CC FLAGS_REG))]
""
"div{<imodesuffix>}\t%3"
[(set_attr "type" "idiv")
(set_attr "mode" "<MODE>")])
......
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