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lvzhengyang
riscv-gcc-1
Commits
456aadaa
Commit
456aadaa
authored
Sep 11, 2000
by
Stephane Carrez
Committed by
Stephane Carrez
Sep 11, 2000
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* gcc.1: Document 68hc11 specific options.
From-SVN: r36312
parent
e0f7170a
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gcc/ChangeLog
View file @
456aadaa
2000-09-10 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* gcc.1: Document 68hc11 specific options.
2000-09-10 Geoff Keating <geoffk@cygnus.com>
* config/rs6000/sysv4.h (MASK_LONG_DOUBLE_128): Define.
...
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gcc/gcc.1
View file @
456aadaa
...
...
@@ -20,7 +20,7 @@
.
if
n
.
sp
.
if
t
.
sp
0.4
..
.
Id
$
Id
:
gcc
.1
,
v
1.1
4
2000
/
04
/
11
06
:
01
:
52
loewis
Exp
$
.
Id
$
Id
:
gcc
.1
,
v
1.1
5
2000
/
05
/
17
08
:
15
:
25
cagney
Exp
$
.
TH
GCC
1
"\*(Dt"
"GNU Tools"
"GNU Tools"
.
SH
NAME
gcc
,
g
++
\-
GNU
project
C
and
C
++
Compiler
(
gcc
-
2.96
)
...
...
@@ -330,6 +330,14 @@ in the following sections.
\-mshort
\-msoft\-float
.Sp
.I M68hc1x\ Options
.br
\-m68hc11
\-m68hc12
\-mshort
\-msoft\-reg\-count \fInum\fP
\-mauto-incdec
.Sp
.I VAX Options
.br
\-mg
...
...
@@ -2877,6 +2885,35 @@ processors, but not by the 68000.
.
PP
These
`\|\
c
.
B
\-
m
\
c
\&\|
' options are defined for the Motorola 68HC11 and 68HC12:
.TP
.B \-m68hc11
Generate output for a 68HC11. This is the default when the compiler
is configured for a 68HC11-based target.
.TP
.B \-m68hc12
Generate output for a 68HC12. This is the default when the compiler
is configured for a 68HC12-based target.
.TP
.B \-mshort
Consider type \c
.B int\c
\& to be 16 bits wide, like \c
.B short int\c
\&.
.TP
.B \-msoft-reg-count=\fInum\fP
Specify the number of pseudo-soft registers which are used for the
code generation. The maximum number is 32. Using more pseudo-soft
register may or may not result in better code depending on the program.
The default is 4 for 68HC11 and 2 for 68HC12.
.TP
.B \-mauto-incdec
Enable the use of 68HC12 pre and post auto-increment and auto-decrement
addressing modes.
.PP
These `\|\c
.B \-m\c
\&\|'
options
are
defined
for
the
Vax
:
.
TP
.
B
\-
munix
...
...
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