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riscv-gcc-1
Commit 44e95206 by Aldy Hernandez Committed by Aldy Hernandez
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s390.c (s390_expand_cs_hqi): Add new arguments to store_bit_field. 

        * config/s390/s390.c (s390_expand_cs_hqi): Add new arguments to
        store_bit_field.
        (s390_expand_atomic): Same.

From-SVN: r177467
parent eebc8f37
Showing with 12 additions and 3 deletions
gcc/ChangeLog
2011-08-05 Aldy Hernandez <aldyh@redhat.com>
* config/s390/s390.c (s390_expand_cs_hqi): Add new arguments to
store_bit_field.
(s390_expand_atomic): Same.
2011-08-05 Richard Henderson <rth@redhat.com>
PR rtl-opt/49977
......
gcc/config/s390/s390.c
......@@ -4733,7 +4733,8 @@ s390_expand_cs_hqi (enum machine_mode mode, rtx target, rtx mem, rtx cmp, rtx ne
if (ac.aligned && MEM_P (cmp))
{
cmpv = force_reg (SImode, val);
store_bit_field (cmpv, GET_MODE_BITSIZE (mode), 0, SImode, cmp);
store_bit_field (cmpv, GET_MODE_BITSIZE (mode), 0,
0, 0, SImode, cmp);
}
else
cmpv = force_reg (SImode, expand_simple_binop (SImode, IOR, cmp, val,
......@@ -4741,7 +4742,8 @@ s390_expand_cs_hqi (enum machine_mode mode, rtx target, rtx mem, rtx cmp, rtx ne
if (ac.aligned && MEM_P (new_rtx))
{
newv = force_reg (SImode, val);
store_bit_field (newv, GET_MODE_BITSIZE (mode), 0, SImode, new_rtx);
store_bit_field (newv, GET_MODE_BITSIZE (mode), 0,
0, 0, SImode, new_rtx);
}
else
newv = force_reg (SImode, expand_simple_binop (SImode, IOR, new_rtx, val,
......@@ -4818,7 +4820,8 @@ s390_expand_atomic (enum machine_mode mode, enum rtx_code code,
/* FALLTHRU */
case SET:
if (ac.aligned && MEM_P (val))
store_bit_field (new_rtx, GET_MODE_BITSIZE (mode), 0, SImode, val);
store_bit_field (new_rtx, GET_MODE_BITSIZE (mode), 0,
0, 0, SImode, val);
else
{
new_rtx = expand_simple_binop (SImode, AND, new_rtx, ac.modemaski,
......
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