Commit 44cfab35 by Naveen.H.S Committed by DJ Delorie

muldiv.md (mulhisi3_c): Limit the mode of the 2nd operand to HI mode.

* config/m32c/muldiv.md (mulhisi3_c): Limit the mode of the 2nd
operand to HI mode.
(mulsi3): New.
(divsi3): New.
(udivsi3): New.

From-SVN: r124524
parent 5abd2125
2007-05-07 Naveen.H.S <naveen.hs@kpitcummins.com>
* config/m32c/muldiv.md (mulhisi3_c): Limit the mode of the 2nd
operand to HI mode.
(mulsi3): New.
(divsi3): New.
(udivsi3): New.
2007-05-07 Jayant Sonar <jayants@kpitcummins.com> 2007-05-07 Jayant Sonar <jayants@kpitcummins.com>
* config/m32c/m32c.c (SYMBOL_FLAG_FUNCVEC_FUNCTION): Define. * config/m32c/m32c.c (SYMBOL_FLAG_FUNCVEC_FUNCTION): Define.
......
...@@ -82,7 +82,7 @@ ...@@ -82,7 +82,7 @@
(define_insn "mulhisi3_c" (define_insn "mulhisi3_c"
[(set (match_operand:SI 0 "ra_operand" "=Rsi") [(set (match_operand:SI 0 "ra_operand" "=Rsi")
(mult:SI (sign_extend:SI (match_operand:HI 1 "mra_operand" "%0")) (mult:SI (sign_extend:SI (match_operand:HI 1 "mra_operand" "%0"))
(match_operand 2 "immediate_operand" "i")))] (match_operand:HI 2 "immediate_operand" "i")))]
"" ""
"mul.w\t%2,%1" "mul.w\t%2,%1"
[(set_attr "flags" "o")] [(set_attr "flags" "o")]
...@@ -159,7 +159,14 @@ ...@@ -159,7 +159,14 @@
}" }"
) )
(define_insn "mulsi3"
[(set (match_operand:SI 0 "r0123_operand" "=R02,R02")
(mult:SI (match_operand:SI 1 "r0123_operand" "%0,0")
(match_operand:SI 2 "mra_operand" "RsiSd,?Rmm")))]
"TARGET_M32C"
"mul.l\t%2,%1"
[(set_attr "flags" "o")]
)
(define_expand "divmodqi4" (define_expand "divmodqi4"
[(set (match_dup 4) [(set (match_dup 4)
...@@ -260,3 +267,23 @@ ...@@ -260,3 +267,23 @@
"divu.w\t%2" "divu.w\t%2"
[(set_attr "flags" "o")] [(set_attr "flags" "o")]
) )
(define_insn "divsi3"
[(set (match_operand:SI 0 "r0123_operand" "=R02,R02")
(div:SI (match_operand:SI 1 "r0123_operand" "0,0")
(match_operand:SI 2 "mra_operand" "RsiSd,?Rmm")))]
"TARGET_M32C"
"div.l\t%2"
[(set_attr "flags" "o")]
)
(define_insn "udivsi3"
[(set (match_operand:SI 0 "r0123_operand" "=R02,R02")
(udiv:SI (match_operand:SI 1 "r0123_operand" "0,0")
(match_operand:SI 2 "mra_operand" "RsiSd,?Rmm")))]
"TARGET_M32C"
"divu.l\t%2"
[(set_attr "flags" "o")]
)
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