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Commit 442fcea7 by Paul Koning Committed by Paul Koning
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re PR c/87795 (Excessive alignment permitted for functions and labels) 

	* config/pdp11/constraints.md: Add "Z" series constraints for use
	with pre-dec and post-inc addressing.
	* config/pdp11/pdp11-protos.m (expand_block_move): Delete.
	(pdp11_expand_operands): Add int argument (word count).
	(pdp11_sp_frame_offset): Delete.
	(pdp11_cmp_length): New function.
	(pushpop_regeq): New function.
	* config/pdp11/pdp11.c (TARGET_STACK_PROTECT_RUNTIME_ENABLED_P):
	Add hook.
	(pdp11_expand_prologue, pdp11_expand_epilogue): Rewrite for new
	frame layout.
	(pdp11_initial_elimination_offset): Ditto.
	(pdp11_expand_operands): Add word count argument.  Bugfixes.
	(output_move_multiple): Change how pointer adjustment is done.
	(pdp11_gen_int_label): Correct format.
	(output_ascii): Ditto.
	(pdp11_asm_output_var): Add code for DEC assembler case.
	(pdp11_asm_print_operand): Bugfix for CONST_DOUBLE holding integer
	value.
	(legitimate_const_double_p): Ditto.
	(pdp11_register_move_cost): Adjust for new register classes.
	(pdp11_regno_reg_class): Ditto.
	(expand_block_move): Delete.
	(pushpop_regeq): New function.
	(pdp11_legitimate_address_p): Bugfix in check for constant
	offset.
	(pdp11_sp_frame_offset): Delete.
	(pdp11_reg_save_size): New helper function for new frame layout.
	(output_addr_const_pdp11): Remove CONST_DOUBLE case.
	(pdp11_expand_shift): Bugfix in check for constant shift count.
	(pdp11_shift_length): Ditto.
	(pdp11_assemble_shift): Copy input to pdp11_expand_operands.
	(pdp11_cmp_length): New function.
	* config/pdp11/pdp11.h (TARGET_CPU_CPP_BUILTINS): Add macros for
	some compile options.
	(FIXED_REGISTERS): Remove HARD_FRAME_POINTER_REGNUM.
	(CALL_USED_REGISTERS): Ditto.
	(ELIMINABLE_REGS): Ditto.
	(REGISTER_NAMES): Ditto.
	(reg_class): Add classes NOTR0_REG through NOTSP_REG for use by Z
	constraints.
	(REG_CLASS_NAMES): Ditto.
	(REG_CLASS_CONTENTS): Ditto.  Also remove
	HARD_FRAME_POINTER_REGNUM.
	(CPU_REG_CLASS): New macro.
	(CLASS_MAX_NREGS): Adjust for new register classes.
	(FUNCTION_PROFILER): Make no-op.
	(may_call_alloca): Remove unused declaration.
	(ASM_OUTPUT_ALIGN): Add workaround for PR87795.
	(ASM_OUTPUT_SKIP): Fix format.
	* config/pdp11/pdp11.md (unspecv): Add UNSPECV_MOVMEM.
	(HARD_FRAME_POINTER_REGNUM): Remove.
	(return): Delete.
	(*rts): Rename.  Remove epilogue related checks.
	(cmpsi, cmpdi): New insn.
	(cbranch<mode>4): Change to apply to SI and DI modes as well.
	(mov<mode>): Change constraints to enforce that push/pop
	destination cannot use the same register as source.
	(*mov<mode><cc_cc>): Ditto.
	(movmemhi, movmemhi1, movmemhi_nocc): Change to expand block move
	at assembly output rather than as RTL expander.
	(zero_extendqihi2): Bugfix in check for same registers.
	(adddi3_nocc): Bugfix in check for constant operand.
	(addsi3_nocc): Ditto.
	(subdi3_nocc): Ditto.
	(subsi3_nocc): Ditto.
	(negdi2_nocc): Copy input to pdp11_expand_operands.
	(negsi2_nocc): Ditto.
	(bswap2_nocc): Ditto.
	* config/pdp11/pdp11.opt (mlra): Fix documentation.
	* config/pdp11/t-pdp11: Use -Os.

From-SVN: r265932
parent d4f680c6
Showing with 177 additions and 44 deletions
gcc/ChangeLog
2018-11-08 Paul Koning <ni1d@arrl.net>
* config/pdp11/constraints.md: Add "Z" series constraints for use
with pre-dec and post-inc addressing.
* config/pdp11/pdp11-protos.m (expand_block_move): Delete.
(pdp11_expand_operands): Add int argument (word count).
(pdp11_sp_frame_offset): Delete.
(pdp11_cmp_length): New function.
(pushpop_regeq): New function.
* config/pdp11/pdp11.c (TARGET_STACK_PROTECT_RUNTIME_ENABLED_P):
Add hook.
(pdp11_expand_prologue, pdp11_expand_epilogue): Rewrite for new
frame layout.
(pdp11_initial_elimination_offset): Ditto.
(pdp11_expand_operands): Add word count argument. Bugfixes.
(output_move_multiple): Change how pointer adjustment is done.
(pdp11_gen_int_label): Correct format.
(output_ascii): Ditto.
(pdp11_asm_output_var): Add code for DEC assembler case.
(pdp11_asm_print_operand): Bugfix for CONST_DOUBLE holding integer
value.
(legitimate_const_double_p): Ditto.
(pdp11_register_move_cost): Adjust for new register classes.
(pdp11_regno_reg_class): Ditto.
(expand_block_move): Delete.
(pushpop_regeq): New function.
(pdp11_legitimate_address_p): Bugfix in check for constant
offset.
(pdp11_sp_frame_offset): Delete.
(pdp11_reg_save_size): New helper function for new frame layout.
(output_addr_const_pdp11): Remove CONST_DOUBLE case.
(pdp11_expand_shift): Bugfix in check for constant shift count.
(pdp11_shift_length): Ditto.
(pdp11_assemble_shift): Copy input to pdp11_expand_operands.
(pdp11_cmp_length): New function.
* config/pdp11/pdp11.h (TARGET_CPU_CPP_BUILTINS): Add macros for
some compile options.
(FIXED_REGISTERS): Remove HARD_FRAME_POINTER_REGNUM.
(CALL_USED_REGISTERS): Ditto.
(ELIMINABLE_REGS): Ditto.
(REGISTER_NAMES): Ditto.
(reg_class): Add classes NOTR0_REG through NOTSP_REG for use by Z
constraints.
(REG_CLASS_NAMES): Ditto.
(REG_CLASS_CONTENTS): Ditto. Also remove
HARD_FRAME_POINTER_REGNUM.
(CPU_REG_CLASS): New macro.
(CLASS_MAX_NREGS): Adjust for new register classes.
(FUNCTION_PROFILER): Make no-op.
(may_call_alloca): Remove unused declaration.
(ASM_OUTPUT_ALIGN): Add workaround for PR87795.
(ASM_OUTPUT_SKIP): Fix format.
* config/pdp11/pdp11.md (unspecv): Add UNSPECV_MOVMEM.
(HARD_FRAME_POINTER_REGNUM): Remove.
(return): Delete.
(*rts): Rename. Remove epilogue related checks.
(cmpsi, cmpdi): New insn.
(cbranch<mode>4): Change to apply to SI and DI modes as well.
(mov<mode>): Change constraints to enforce that push/pop
destination cannot use the same register as source.
(*mov<mode><cc_cc>): Ditto.
(movmemhi, movmemhi1, movmemhi_nocc): Change to expand block move
at assembly output rather than as RTL expander.
(zero_extendqihi2): Bugfix in check for same registers.
(adddi3_nocc): Bugfix in check for constant operand.
(addsi3_nocc): Ditto.
(subdi3_nocc): Ditto.
(subsi3_nocc): Ditto.
(negdi2_nocc): Copy input to pdp11_expand_operands.
(negsi2_nocc): Ditto.
(bswap2_nocc): Ditto.
* config/pdp11/pdp11.opt (mlra): Fix documentation.
* config/pdp11/t-pdp11: Use -Os.
2018-11-08 Richard Earnshaw <rearnsha@arm.com>
* config/arm/parsecpu.awk (/alias/): New parsing rule.
gcc/config/pdp11/constraints.md
......@@ -88,3 +88,32 @@
(match_test "memory_address_p (GET_MODE (op), XEXP (op, 0))
&& no_side_effect_operand (op, GET_MODE (op))")))
;; What follows is a set of constraints used to prevent the generation
;; of insns that have a register as source, and an auto-increment or
;; auto-decrement memory reference as the destination where the register
;; is the same as the source. On the PDP11, such instructions are not
;; implemented consistently across the models and often do something
;; different from what the RTL intends.
(define_register_constraint "Z0" "NOTR0_REG" "Register other than 0")
(define_register_constraint "Z1" "NOTR1_REG" "Register other than 1")
(define_register_constraint "Z2" "NOTR2_REG" "Register other than 2")
(define_register_constraint "Z3" "NOTR3_REG" "Register other than 3")
(define_register_constraint "Z4" "NOTR4_REG" "Register other than 4")
(define_register_constraint "Z5" "NOTR5_REG" "Register other than 5")
(define_register_constraint "Z6" "NOTSP_REG"
"Register other than stack pointer (register 6)")
(define_memory_constraint "Za" "R0 push/pop"
(match_test "pushpop_regeq (op, 0)"))
(define_memory_constraint "Zb" "R1 push/pop"
(match_test "pushpop_regeq (op, 1)"))
(define_memory_constraint "Zc" "R2 push/pop"
(match_test "pushpop_regeq (op, 2)"))
(define_memory_constraint "Zd" "R3 push/pop"
(match_test "pushpop_regeq (op, 3)"))
(define_memory_constraint "Ze" "R4 push/pop"
(match_test "pushpop_regeq (op, 4)"))
(define_memory_constraint "Zf" "R5 push/pop"
(match_test "pushpop_regeq (op, 5)"))
(define_memory_constraint "Zg" "SP push/pop"
(match_test "pushpop_regeq (op, 6)"))
gcc/config/pdp11/pdp11-protos.h
......@@ -26,14 +26,12 @@ extern int legitimate_const_double_p (rtx);
extern void notice_update_cc_on_set (rtx, rtx);
extern void output_addr_const_pdp11 (FILE *, rtx);
extern const char *output_move_multiple (rtx *);
extern void expand_block_move (rtx *);
extern const char *output_jump (rtx *, int, int);
extern void print_operand_address (FILE *, rtx);
typedef enum { no_action, dec_before, inc_after } pdp11_action;
typedef enum { little, either, big } pdp11_partorder;
extern bool pdp11_expand_operands (rtx *, rtx [][2], int,
extern bool pdp11_expand_operands (rtx *, rtx [][2], int, int,
pdp11_action *, pdp11_partorder);
extern int pdp11_sp_frame_offset (void);
extern int pdp11_initial_elimination_offset (int, int);
extern enum reg_class pdp11_regno_reg_class (int);
extern bool pdp11_fixed_cc_regs (unsigned int *, unsigned int *);
......@@ -42,6 +40,8 @@ extern bool pdp11_expand_shift (rtx *, rtx (*) (rtx, rtx, rtx),
rtx (*) (rtx, rtx, rtx));
extern const char * pdp11_assemble_shift (rtx *, machine_mode, int);
extern int pdp11_shift_length (rtx *, machine_mode, int, bool);
extern int pdp11_cmp_length (rtx *, int);
extern bool pushpop_regeq (rtx, int);
extern bool pdp11_small_shift (int);
#endif /* RTX_CODE */
......
gcc/config/pdp11/pdp11.h
......@@ -32,6 +32,20 @@ along with GCC; see the file COPYING3. If not see
do \
{ \
builtin_define_std ("pdp11"); \
if (TARGET_INT16) \
builtin_define_with_int_value ("__pdp11_int", 16); \
else \
builtin_define_with_int_value ("__pdp11_int", 32); \
if (TARGET_40) \
builtin_define_with_int_value ("__pdp11_model", 40); \
else if (TARGET_45) \
builtin_define_with_int_value ("__pdp11_model", 45); \
else \
builtin_define_with_int_value ("__pdp11_model", 10); \
if (TARGET_FPU) \
builtin_define ("__pdp11_fpu"); \
if (TARGET_AC0) \
builtin_define ("__pdp11_ac0"); \
} \
while (0)
......@@ -153,7 +167,7 @@ extern const struct real_format pdp11_d_format;
#define FIXED_REGISTERS \
{0, 0, 0, 0, 0, 0, 1, 1, \
0, 0, 0, 0, 0, 0, 1, 1, \
1, 1 }
1 }
......@@ -168,7 +182,7 @@ extern const struct real_format pdp11_d_format;
#define CALL_USED_REGISTERS \
{1, 1, 0, 0, 0, 0, 1, 1, \
0, 0, 0, 0, 0, 0, 1, 1, \
1, 1 }
1 }
/* Specify the registers used for certain standard purposes.
......@@ -211,6 +225,13 @@ CC_REGS is the condition codes (CPU and FPU)
enum reg_class
{ NO_REGS,
NOTR0_REG,
NOTR1_REG,
NOTR2_REG,
NOTR3_REG,
NOTR4_REG,
NOTR5_REG,
NOTSP_REG,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
......@@ -229,6 +250,13 @@ enum reg_class
#define REG_CLASS_NAMES \
{ "NO_REGS", \
"NOTR0_REG", \
"NOTR1_REG", \
"NOTR2_REG", \
"NOTR3_REG", \
"NOTR4_REG", \
"NOTR5_REG", \
"SP_REG", \
"MUL_REGS", \
"GENERAL_REGS", \
"LOAD_FPU_REGS", \
......@@ -243,13 +271,20 @@ enum reg_class
#define REG_CLASS_CONTENTS \
{ {0x00000}, /* NO_REGS */ \
{0x000aa}, /* MUL_REGS */ \
{0x0c0ff}, /* GENERAL_REGS */ \
{0x000fe}, /* NOTR0_REG */ \
{0x000fd}, /* NOTR1_REG */ \
{0x000fb}, /* NOTR2_REG */ \
{0x000f7}, /* NOTR3_REG */ \
{0x000ef}, /* NOTR4_REG */ \
{0x000df}, /* NOTR5_REG */ \
{0x000bf}, /* NOTSP_REG */ \
{0x0002a}, /* MUL_REGS */ \
{0x040ff}, /* GENERAL_REGS */ \
{0x00f00}, /* LOAD_FPU_REGS */ \
{0x03000}, /* NO_LOAD_FPU_REGS */ \
{0x03f00}, /* FPU_REGS */ \
{0x30000}, /* CC_REGS */ \
{0x3ffff}} /* ALL_REGS */
{0x18000}, /* CC_REGS */ \
{0x1ffff}} /* ALL_REGS */
/* The same information, inverted:
Return the class number of the smallest class containing
......@@ -262,13 +297,17 @@ enum reg_class
#define INDEX_REG_CLASS GENERAL_REGS
#define BASE_REG_CLASS GENERAL_REGS
/* Return TRUE if the class is a CPU register. */
#define CPU_REG_CLASS(CLASS) \
(CLASS >= NOTR0_REG && CLASS <= GENERAL_REGS)
/* Return the maximum number of consecutive registers
needed to represent mode MODE in a register of class CLASS. */
#define CLASS_MAX_NREGS(CLASS, MODE) \
((CLASS == GENERAL_REGS || CLASS == MUL_REGS)? \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \
1 \
)
(CPU_REG_CLASS (CLASS) ? \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \
1 \
)
/* Stack layout; function entry, exit and calling. */
......@@ -328,16 +367,13 @@ extern int current_first_parm_offset;
/* Output assembler code to FILE to increment profiler label # LABELNO
for profiling a function entry. */
#define FUNCTION_PROFILER(FILE, LABELNO) \
gcc_unreachable ();
#define FUNCTION_PROFILER(FILE, LABELNO)
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
the stack pointer does not matter. The value is tested only in
functions that have frame pointers.
No definition is equivalent to always zero. */
extern int may_call_alloca;
#define EXIT_IGNORE_STACK 1
/* Definitions for register eliminations.
......@@ -347,17 +383,14 @@ extern int may_call_alloca;
followed by "to". Eliminations of the same "from" register are listed
in order of preference.
There are two registers that can always be eliminated on the pdp11.
The frame pointer and the arg pointer can be replaced by either the
hard frame pointer or to the stack pointer, depending upon the
circumstances. The hard frame pointer is not used before reload and
so it is not eligible for elimination. */
There are two registers that can be eliminated on the pdp11. The
arg pointer can be replaced by the frame pointer; the frame pointer
can often be replaced by the stack pointer. */
#define ELIMINABLE_REGS \
{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
((OFFSET) = pdp11_initial_elimination_offset ((FROM), (TO)))
......@@ -514,8 +547,8 @@ extern int may_call_alloca;
#define REGISTER_NAMES \
{"r0", "r1", "r2", "r3", "r4", "r5", "sp", "pc", \
"ac0", "ac1", "ac2", "ac3", "ac4", "ac5", "fp", "ap", \
"cc", "fcc" }
"ac0", "ac1", "ac2", "ac3", "ac4", "ac5", "ap", "cc", \
"fcc" }
/* Globalizing directive for a label. */
#define GLOBAL_ASM_OP "\t.globl\t"
......@@ -568,28 +601,22 @@ extern int may_call_alloca;
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
pdp11_output_addr_vec_elt (FILE, VALUE)
/* This is how to output an assembler line
that says to advance the location counter
to a multiple of 2**LOG bytes.
/* This is how to output an assembler line that says to advance the
location counter to a multiple of 2**LOG bytes. Only values 0 and
1 should appear, but due to PR87795 larger values (which are not
supported) can also appear. So we treat all alignment of LOG >= 1
as word (2 byte) alignment.
*/
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
switch (LOG) \
{ \
case 0: \
break; \
case 1: \
fprintf (FILE, "\t.even\n"); \
break; \
default: \
gcc_unreachable (); \
}
if (LOG != 0) \
fprintf (FILE, "\t.even\n")
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
if (TARGET_DEC_ASM) \
fprintf (FILE, "\t.blkb\t%ho\n", (SIZE) & 0xffff); \
fprintf (FILE, "\t.blkb\t%o\n", (SIZE) & 0xffff); \
else \
fprintf (FILE, "\t.=.+ %#ho\n", (SIZE) & 0xffff);
fprintf (FILE, "\t.=.+ %#o\n", (SIZE) & 0xffff);
/* This says how to output an assembler line
to define a global common symbol. */
......@@ -597,7 +624,6 @@ extern int may_call_alloca;
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, true)
/* This says how to output an assembler line
to define a local common symbol. */
......
gcc/config/pdp11/pdp11.opt
......@@ -68,4 +68,4 @@ Use UNIX assembler syntax.
mlra
Target Report Mask(LRA)
Use LRA register allocator
Use LRA register allocator.
gcc/config/pdp11/t-pdp11
......@@ -18,6 +18,10 @@
MULTILIB_OPTIONS = msoft-float
# Optimize for space
LIBGCC2_CFLAGS = -Os
CRTSTUFF_T_CFLAGS = -Os
# Because the pdp11 POINTER_SIZE is only 16, in dwarf2out.c,
# DWARF_ARANGES_PAD_SIZE is 0, thus a loop in output_aranges that checks
# (i < (unsigned) DWARF_ARANGES_PAD_SIZE) elicits a warning that the
......
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