[MIPS] Remove W32 and W64 pseudo-processors.

gcc/
	* config/mips/mips.c (mips_rtx_cost_data): Remove costs for W32 and W64
	pseudo-processors.
	* config/mips/mips.md (processor): Remove w32 and w64.

From-SVN: r226851

gcc/ChangeLog

+2015-08-13  Robert Suchanek  <robert.suchanek@imgtec.com>
+
+	* config/mips/mips.c (mips_rtx_cost_data): Remove costs for W32 and W64
+	pseudo-processors.
+	* config/mips/mips.md (processor): Remove w32 and w64.
+
 2015-08-13  Richard Biener  <rguenther@suse.de>
 
 	PR tree-optimization/66502

gcc/config/mips/mips.c

@@ -1255,32 +1255,6 @@ static const struct mips_rtx_cost_data
 		    2,            /* branch_cost */
 		    4             /* memory_latency */
   },
-  { /* W32 */
-    COSTS_N_INSNS (4),            /* fp_add */
-    COSTS_N_INSNS (4),            /* fp_mult_sf */
-    COSTS_N_INSNS (5),            /* fp_mult_df */
-    COSTS_N_INSNS (17),           /* fp_div_sf */
-    COSTS_N_INSNS (32),           /* fp_div_df */
-    COSTS_N_INSNS (5),            /* int_mult_si */
-    COSTS_N_INSNS (5),            /* int_mult_di */
-    COSTS_N_INSNS (41),           /* int_div_si */
-    COSTS_N_INSNS (41),           /* int_div_di */
-		     1,           /* branch_cost */
-		     4            /* memory_latency */
-  },
-  { /* W64 */
-    COSTS_N_INSNS (4),            /* fp_add */
-    COSTS_N_INSNS (4),            /* fp_mult_sf */
-    COSTS_N_INSNS (5),            /* fp_mult_df */
-    COSTS_N_INSNS (17),           /* fp_div_sf */
-    COSTS_N_INSNS (32),           /* fp_div_df */
-    COSTS_N_INSNS (5),            /* int_mult_si */
-    COSTS_N_INSNS (5),            /* int_mult_di */
-    COSTS_N_INSNS (41),           /* int_div_si */
-    COSTS_N_INSNS (41),           /* int_div_di */
-		     1,           /* branch_cost */
-		     4            /* memory_latency */
-  },
   { /* M5100 */
     COSTS_N_INSNS (4),            /* fp_add */
     COSTS_N_INSNS (4),            /* fp_mult_sf */

gcc/config/mips/mips.md

@@ -67,8 +67,6 @@
   xlr
   xlp
   p5600
-  w32
-  w64
   m5100
   i6400
 ])