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riscv-gcc-1
Commit 43cffd11 by Richard Earnshaw Committed by Richard Earnshaw
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arm.md: Use gen_rtx_FOO instead of gen_rtx (FOO, ...). 

* arm.md: Use gen_rtx_FOO instead of gen_rtx (FOO, ...).
* arm.h: Likewise.
* arm.c: Likewise.
* arm.h (TARGET_OPTIONS): Reformat for clarity.
(GO_IF_LEGITIMATE_ADDRESS): When generating PIC, references to symbols
in the constant pool aren't valid.
(LEGITIMATE_PIC_OPERAND_P): Likewise.
* arm.c: Include "system.h", not stdio.h and string.h.

From-SVN: r25175
parent b4fce8ab
Showing with 97 additions and 65 deletions
gcc/ChangeLog
Sat Feb 13 05:32:00 1999 Richard Earnshaw (rearnsha@arm.com)
* arm.md: Use gen_rtx_FOO instead of gen_rtx (FOO, ...).
* arm.h: Likewise.
* arm.c: Likewise.
* arm.h (TARGET_OPTIONS): Reformat for clarity.
(GO_IF_LEGITIMATE_ADDRESS): When generating PIC, references to symbols
in the constant pool aren't valid.
(LEGITIMATE_PIC_OPERAND_P): Likewise.
* arm.c: Include "system.h", not stdio.h and string.h.
Fri Feb 12 13:06:28 1999 Jim Wilson <wilson@cygnus.com>
* stmt.c (expand_return): Return if optimize_tail_recursion succeeded.
......
gcc/config/arm/arm.h
......@@ -395,14 +395,23 @@ function tries to return. */
{"", TARGET_DEFAULT } \
}
#define TARGET_OPTIONS \
{ \
{"cpu=", & arm_select[1].string, "Specify the name of the target CPU" }, \
{"arch=", & arm_select[2].string, "Specify the name of the target architecture" }, \
{"tune=", & arm_select[3].string, "" }, \
{"fp=", & target_fp_name, "Specify the version of the floating point emulator"}, \
{ "structure-size-boundary=", & structure_size_string, \
"Specify the minumum bit alignment of structures" } \
#define TARGET_OPTIONS \
{ \
{"cpu=", \
&arm_select[1].string, \
"Specify the name of the target CPU"}, \
{"arch=", \
&arm_select[2].string, \
"Specify the name of the target architecture"}, \
{"tune=", \
&arm_select[3].string, \
"Order instructions for best performance on this CPU"}, \
{"fp=", \
&target_fp_name, \
"Specify the version of the floating point emulator"}, \
{"structure-size-boundary=", \
&structure_size_string, \
"Specify the minumum bit alignment of structures"} \
}
/* arm_select[0] is reserved for the default cpu. */
......@@ -1035,15 +1044,15 @@ do { \
otherwise, FUNC is 0. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
(GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT && TARGET_HARD_FLOAT \
? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \
: gen_rtx (REG, TYPE_MODE (VALTYPE), 0))
? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \
: gen_rtx_REG (TYPE_MODE (VALTYPE), 0))
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) \
(GET_MODE_CLASS (MODE) == MODE_FLOAT && TARGET_HARD_FLOAT \
? gen_rtx (REG, MODE, 16) \
: gen_rtx (REG, MODE, 0))
? gen_rtx_REG (MODE, 16) \
: gen_rtx_REG (MODE, 0))
/* 1 if N is a possible register number for a function value.
On the ARM, only r0 and f0 can return results. */
......@@ -1053,7 +1062,7 @@ do { \
/* How large values are returned */
/* A C expression which can inhibit the returning of certain function values
in registers, based on the type of value. */
#define RETURN_IN_MEMORY(TYPE) \
#define RETURN_IN_MEMORY(TYPE) \
(TYPE_MODE ((TYPE)) == BLKmode || \
(AGGREGATE_TYPE_P ((TYPE)) && arm_return_in_memory ((TYPE))))
......@@ -1082,7 +1091,7 @@ do { \
stack if necessary). */
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
((NAMED) \
? ((CUM) >= 16 ? 0 : gen_rtx (REG, MODE, (CUM) / 4)) \
? ((CUM) >= 16 ? 0 : gen_rtx_REG (MODE, (CUM) / 4)) \
: 0)
/* For an arg passed partly in registers and partly in memory,
......@@ -1275,9 +1284,9 @@ do { \
CXT is an RTX for the static chain value for the function. */
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
(CXT)); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
(FNADDR)); \
}
......@@ -1515,7 +1524,9 @@ do \
} */ \
else if (GET_MODE_CLASS (MODE) != MODE_FLOAT \
&& GET_CODE (X) == SYMBOL_REF \
&& CONSTANT_POOL_ADDRESS_P (X)) \
&& CONSTANT_POOL_ADDRESS_P (X) \
&& ! (flag_pic \
&& symbol_mentioned_p (get_pool_constant (X)))) \
goto LABEL; \
else if ((GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_DEC) \
&& (GET_MODE_SIZE (MODE) <= 4) \
......@@ -1575,14 +1586,14 @@ extern struct rtx_def *legitimize_pic_address ();
n -= low_n; \
} \
base_reg = gen_reg_rtx (SImode); \
val = force_operand (gen_rtx (PLUS, SImode, xop0, \
GEN_INT (n)), NULL_RTX); \
val = force_operand (gen_rtx_PLUS (SImode, xop0, \
GEN_INT (n)), NULL_RTX); \
emit_move_insn (base_reg, val); \
(X) = (low_n == 0 ? base_reg \
: gen_rtx (PLUS, SImode, base_reg, GEN_INT (low_n))); \
: gen_rtx_PLUS (SImode, base_reg, GEN_INT (low_n))); \
} \
else if (xop0 != XEXP (X, 0) || xop1 != XEXP (x, 1)) \
(X) = gen_rtx (PLUS, SImode, xop0, xop1); \
(X) = gen_rtx_PLUS (SImode, xop0, xop1); \
} \
else if (GET_CODE (X) == MINUS) \
{ \
......@@ -1594,7 +1605,7 @@ extern struct rtx_def *legitimize_pic_address ();
if (CONSTANT_P (xop1) && ! symbol_mentioned_p (xop1)) \
xop1 = force_reg (SImode, xop1); \
if (xop0 != XEXP (X, 0) || xop1 != XEXP (X, 1)) \
(X) = gen_rtx (MINUS, SImode, xop0, xop1); \
(X) = gen_rtx_MINUS (SImode, xop0, xop1); \
} \
if (flag_pic) \
(X) = legitimize_pic_address (OLDX, MODE, NULL_RTX); \
......@@ -1768,7 +1779,12 @@ extern int arm_pic_register;
#define FINALIZE_PIC arm_finalize_pic ()
#define LEGITIMATE_PIC_OPERAND_P(X) (! symbol_mentioned_p (X))
/* We can't directly access anything that contains a symbol, nor can
we indirect via the constant pool */
#define LEGITIMATE_PIC_OPERAND_P(X) \
(! symbol_mentioned_p (X) \
&& (! CONSTANT_POOL_ADDRESS_P (X) \
|| ! symbol_mentioned_p (get_pool_constant (X))))
......@@ -2041,7 +2057,7 @@ do { \
#define RETURN_ADDR_RTX(COUNT, FRAME) \
((COUNT == 0) \
? gen_rtx (MEM, Pmode, plus_constant (FRAME, -4)) \
? gen_rtx_MEM (Pmode, plus_constant (FRAME, -4)) \
: NULL_RTX)
/* Used to mask out junk bits from the return address, such as
......
gcc/config/arm/arm.md
......@@ -1298,8 +1298,8 @@
rtx op1 = gen_reg_rtx (SImode);
emit_insn (gen_ashlsi3 (op0, operands[3], GEN_INT (32 - width)));
emit_insn (gen_iorsi3 (op1, gen_rtx (LSHIFTRT, SImode, operands[0],
operands[1]),
emit_insn (gen_iorsi3 (op1, gen_rtx_LSHIFTRT (SImode, operands[0],
operands[1]),
op0));
emit_insn (gen_rotlsi3 (subtarget, op1, operands[1]));
}
......@@ -1315,8 +1315,8 @@
emit_insn (gen_ashlsi3 (op0, operands[3], GEN_INT (32 - width)));
emit_insn (gen_ashlsi3 (op1, operands[0], operands[1]));
emit_insn (gen_iorsi3 (subtarget,
gen_rtx (LSHIFTRT, SImode, op1,
operands[1]), op0));
gen_rtx_LSHIFTRT (SImode, op1, operands[1]),
op0));
}
else
{
......@@ -1353,13 +1353,13 @@
}
if (start_bit != 0)
op0 = gen_rtx (ASHIFT, SImode, op0, operands[2]);
op0 = gen_rtx_ASHIFT (SImode, op0, operands[2]);
emit_insn (gen_andsi_notsi_si (op2, operands[0], op0));
}
if (start_bit != 0)
op1 = gen_rtx (ASHIFT, SImode, op1, operands[2]);
op1 = gen_rtx_ASHIFT (SImode, op1, operands[2]);
emit_insn (gen_iorsi3 (subtarget, op1, op2));
}
......@@ -2187,8 +2187,8 @@
{
if (arm_arch4 && GET_CODE (operands[1]) == MEM)
{
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (ZERO_EXTEND, SImode, operands[1])));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_ZERO_EXTEND (SImode, operands[1])));
DONE;
}
if (TARGET_SHORT_BY_BYTES && GET_CODE (operands[1]) == MEM)
......@@ -2289,8 +2289,8 @@
{
if (arm_arch4 && GET_CODE (operands[1]) == MEM)
{
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (SIGN_EXTEND, SImode, operands[1])));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_SIGN_EXTEND (SImode, operands[1])));
DONE;
}
......@@ -2318,10 +2318,10 @@
rtx mem1, mem2;
rtx addr = copy_to_mode_reg (SImode, XEXP (operands[1], 0));
mem1 = gen_rtx (MEM, QImode, addr);
mem1 = gen_rtx_MEM (QImode, addr);
MEM_COPY_ATTRIBUTES (mem1, operands[1]);
RTX_UNCHANGING_P (mem1) = RTX_UNCHANGING_P (operands[1]);
mem2 = gen_rtx (MEM, QImode, plus_constant (addr, 1));
mem2 = gen_rtx_MEM (QImode, plus_constant (addr, 1));
MEM_COPY_ATTRIBUTES (mem2, operands[1]);
RTX_UNCHANGING_P (mem2) = RTX_UNCHANGING_P (operands[1]);
operands[0] = gen_lowpart (SImode, operands[0]);
......@@ -2393,8 +2393,8 @@
{
if (arm_arch4 && GET_CODE (operands[1]) == MEM)
{
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (SIGN_EXTEND, HImode, operands[1])));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_SIGN_EXTEND (HImode, operands[1])));
DONE;
}
if (! s_register_operand (operands[1], QImode))
......@@ -2429,8 +2429,8 @@
{
HOST_WIDE_INT offset;
operands[3] = gen_rtx (REG, SImode, REGNO (operands[0]));
operands[2] = gen_rtx (MEM, QImode, operands[3]);
operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]));
operands[2] = gen_rtx_MEM (QImode, operands[3]);
MEM_COPY_ATTRIBUTES (operands[2], operands[1]);
RTX_UNCHANGING_P (operands[2]) = RTX_UNCHANGING_P (operands[1]);
operands[1] = XEXP (operands[1], 0);
......@@ -2448,8 +2448,9 @@
else if (GET_CODE (operands[1]) == PLUS
&& GET_CODE (XEXP (operands[1], 1)) != CONST_INT
&& ! s_register_operand (XEXP (operands[1], 1), VOIDmode))
operands[1] = gen_rtx (PLUS, GET_MODE (operands[1]),
XEXP (operands[1], 1), XEXP (operands[1], 0));
operands[1] = gen_rtx_PLUS (GET_MODE (operands[1]),
XEXP (operands[1], 1),
XEXP (operands[1], 0));
}
")
......@@ -2465,8 +2466,8 @@
{
if (arm_arch4 && GET_CODE (operands[1]) == MEM)
{
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (SIGN_EXTEND, SImode, operands[1])));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_SIGN_EXTEND (SImode, operands[1])));
DONE;
}
if (! s_register_operand (operands[1], QImode))
......@@ -2500,7 +2501,7 @@
{
HOST_WIDE_INT offset;
operands[2] = gen_rtx (MEM, QImode, operands[0]);
operands[2] = gen_rtx_MEM (QImode, operands[0]);
MEM_COPY_ATTRIBUTES (operands[2], operands[1]);
RTX_UNCHANGING_P (operands[2]) = RTX_UNCHANGING_P (operands[1]);
operands[1] = XEXP (operands[1], 0);
......@@ -2518,8 +2519,9 @@
else if (GET_CODE (operands[1]) == PLUS
&& GET_CODE (XEXP (operands[1], 1)) != CONST_INT
&& ! s_register_operand (XEXP (operands[1], 1), VOIDmode))
operands[1] = gen_rtx (PLUS, GET_MODE (operands[1]),
XEXP (operands[1], 1), XEXP (operands[1], 0));
operands[1] = gen_rtx_PLUS (GET_MODE (operands[1]),
XEXP (operands[1], 1),
XEXP (operands[1], 0));
}
")
......@@ -2898,7 +2900,7 @@
}
emit_insn (gen_movsi (reg, GEN_INT (val)));
operands[1] = gen_rtx (SUBREG, HImode, reg, 0);
operands[1] = gen_rtx_SUBREG (HImode, reg, 0);
}
else if (! arm_arch4)
{
......@@ -2919,8 +2921,8 @@
HOST_WIDE_INT new_offset = INTVAL (offset) & ~2;
rtx new;
new = gen_rtx (MEM, SImode,
plus_constant (base, new_offset));
new = gen_rtx_MEM (SImode,
plus_constant (base, new_offset));
MEM_COPY_ATTRIBUTES (new, operands[1]);
RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (operands[1]);
emit_insn (gen_movsi (reg, new));
......@@ -2955,17 +2957,18 @@
if ((INTVAL (offset) & 2) == 2)
{
HOST_WIDE_INT new_offset = INTVAL (offset) ^ 2;
new = gen_rtx (MEM, SImode,
plus_constant (base, new_offset));
new = gen_rtx_MEM (SImode,
plus_constant (base, new_offset));
MEM_COPY_ATTRIBUTES (new, operands[1]);
RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (operands[1]);
emit_insn (gen_movsi (reg, new));
}
else
{
new = gen_rtx (MEM, SImode, XEXP (operands[1], 0));
new = gen_rtx_MEM (SImode, XEXP (operands[1], 0));
MEM_COPY_ATTRIBUTES (new, operands[1]);
RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (operands[1]);
RTX_UNCHANGING_P (new)
= RTX_UNCHANGING_P (operands[1]);
emit_insn (gen_rotated_loadsi (reg, new));
}
......@@ -2990,7 +2993,7 @@
if (GET_CODE (operands[0]) != REG)
abort ();
operands[0] = gen_rtx (SUBREG, SImode, operands[0], 0);
operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
emit_insn (gen_movsi (operands[0], operands[1]));
DONE;
}
......@@ -3007,7 +3010,7 @@
rtx ops[2];
ops[0] = operands[0];
ops[1] = gen_rtx (MEM, SImode, plus_constant (XEXP (operands[1], 0), 2));
ops[1] = gen_rtx_MEM (SImode, plus_constant (XEXP (operands[1], 0), 2));
output_asm_insn (\"ldr%?\\t%0, %1\\t%@ load-rotate\", ops);
return \"\";
}"
......@@ -3025,10 +3028,10 @@
rtx mem1, mem2;
rtx addr = copy_to_mode_reg (SImode, XEXP (operands[1], 0));
mem1 = gen_rtx (MEM, QImode, addr);
mem1 = gen_rtx_MEM (QImode, addr);
MEM_COPY_ATTRIBUTES (mem1, operands[1]);
RTX_UNCHANGING_P (mem1) = RTX_UNCHANGING_P (operands[1]);
mem2 = gen_rtx (MEM, QImode, plus_constant (addr, 1));
mem2 = gen_rtx_MEM (QImode, plus_constant (addr, 1));
MEM_COPY_ATTRIBUTES (mem2, operands[1]);
RTX_UNCHANGING_P (mem2) = RTX_UNCHANGING_P (operands[1]);
operands[0] = gen_lowpart (SImode, operands[0]);
......@@ -3163,7 +3166,7 @@
rtx reg = gen_reg_rtx (SImode);
emit_insn (gen_movsi (reg, operands[1]));
operands[1] = gen_rtx (SUBREG, QImode, reg, 0);
operands[1] = gen_rtx_SUBREG (QImode, reg, 0);
}
if (GET_CODE (operands[0]) == MEM)
operands[1] = force_reg (QImode, operands[1]);
......@@ -3251,8 +3254,8 @@
operands[2] = XEXP (operands[0], 0);
else if (code == POST_INC || code == PRE_DEC)
{
operands[0] = gen_rtx (SUBREG, DImode, operands[0], 0);
operands[1] = gen_rtx (SUBREG, DImode, operands[1], 0);
operands[0] = gen_rtx_SUBREG (DImode, operands[0], 0);
operands[1] = gen_rtx_SUBREG (DImode, operands[1], 0);
emit_insn (gen_movdi (operands[0], operands[1]));
DONE;
}
......@@ -3268,8 +3271,8 @@
emit_insn (gen_addsi3 (operands[2], XEXP (XEXP (operands[0], 0), 0),
XEXP (XEXP (operands[0], 0), 1)));
emit_insn (gen_rtx (SET, VOIDmode, gen_rtx (MEM, DFmode, operands[2]),
operands[1]));
emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_MEM (DFmode, operands[2]),
operands[1]));
if (code == POST_DEC)
emit_insn (gen_addsi3 (operands[2], operands[2], GEN_INT (-8)));
......@@ -6140,8 +6143,8 @@
enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), operands[2],
operands[3]);
operands[6] = gen_rtx (REG, mode, 24);
operands[7] = gen_rtx (COMPARE, mode, operands[2], operands[3]);
operands[6] = gen_rtx_REG (mode, 24);
operands[7] = gen_rtx_COMPARE (mode, operands[2], operands[3]);
}
")
......
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