re PR rtl-optimization/33552 (wrong code for multiple output asm, wrong df?)

        PR rtl-optimization/33552
        * gcc.target/i386/pr33552.c: New runtime test.
        * gcc.target/i386/strinline.c: New compile time test.

Co-Authored-By: Jakub Jelinek <jakub@redhat.com>

From-SVN: r128865

gcc/testsuite/ChangeLog

+2007-09-28  Michael Matz  <matz@suse.de>
+	    Jakub Jelinek  <jakub@redhat.com>
+
+	PR rtl-optimization/33552
+	* gcc.target/i386/pr33552.c: New runtime test.
+	* gcc.target/i386/strinline.c: New compile time test.
+
 2007-09-28  Jakub Jelinek  <jakub@redhat.com>
 
 	* gfortran.dg/openmp_stack.f90: Removed.

gcc/testsuite/gcc.target/i386/pr33552.c

+/* PR rtl-optimization/33552 */
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+
+extern void abort (void);
+
+void
+__attribute__((noinline))
+foo (unsigned long *wp, unsigned long *up, long un, unsigned long *vp)
+{
+  long j;
+  unsigned long prod_low, prod_high;
+  unsigned long cy_dig;
+  unsigned long v_limb;
+  v_limb = vp[0];
+  cy_dig = 64;
+  for (j = un; j > 0; j--)
+    {
+      unsigned long u_limb, w_limb;
+      u_limb = *up++;
+      __asm__ (""
+               : "=r" (prod_low), "=r" (prod_high)
+               : "0" (u_limb), "1" (v_limb));
+      __asm__ ("mov %5, %1; add %5, %0"
+               : "=r" (cy_dig), "=&r" (w_limb)
+               : "0" (prod_high), "rm" (0), "1" (prod_low), "rm" (cy_dig));
+      *wp++ = w_limb;
+    }
+}
+
+int
+main (void)
+{
+  unsigned long wp[4];
+  unsigned long up[4] = { 0x1248, 0x248a, 0x1745, 0x1853 };
+  unsigned long vp = 0xdead;
+  foo (wp, up, 4, &vp);
+  if (wp[0] != 0x40 || wp[1] != 0xdeed || wp[2] != 0x1bd9a || wp[3] != 0x29c47)
+    abort ();
+  return 0;
+}

gcc/testsuite/gcc.target/i386/strinline.c

+/* { dg-do compile } */
+/* { dg-options "-O2 -fPIC" } */
+typedef unsigned int size_t;
+ char *
+__mempcpy_by2 (char *__dest, __const char *__src, size_t __srclen)
+{
+  register char *__tmp = __dest;
+  register unsigned long int __d0, __d1;
+  __asm__ __volatile__
+    ("shrl      $1,%3\n\t"
+     "jz        2f\n"
+     "1:\n\t"
+     "movl      (%2),%0\n\t"
+     "leal      4(%2),%2\n\t"
+     "movl      %0,(%1)\n\t"
+     "leal      4(%1),%1\n\t"
+     "decl      %3\n\t"
+     "jnz       1b\n"
+     "2:\n\t"
+     "movw      (%2),%w0\n\t"
+     "movw      %w0,(%1)"
+     : "=&q" (__d0), "=r" (__tmp), "=&r" (__src), "=&r" (__d1),
+       "=m" ( *(struct { __extension__ char __x[__srclen]; } *)__dest)
+     : "1" (__tmp), "2" (__src), "3" (__srclen / 2),
+       "m" ( *(struct { __extension__ char __x[__srclen]; } *)__src)
+     : "cc");
+  return __tmp + 2;
+}