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riscv-gcc-1
Commit 42d085c1 by Richard Henderson Committed by Richard Henderson
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Avoid !TARGET_ABI_OPEN_VMS in favor of a positive test for TARGET_ABI_OSF. 

From-SVN: r171331
parent cabbe12a
Showing with 37 additions and 23 deletions
gcc/ChangeLog
2011-03-22 Richard Henderson <rth@redhat.com>
* config/alpha/alpha.c (direct_return): Use TARGET_ABI_OSF instead
of !TARGET_ABI_OPEN_VMS.
(alpha_trampoline_init, alpha_start_function): Likewise.
(alpha_expand_epilogue, alpha_file_start): Likewise.
* config/alpha/alpha.md (divsi3, modsi3): Likewise.
(udivsi3, umodsi3, divdi3, moddi3, udivdi3, umoddi3): Likewise.
(*divmodsi_internal_er, *divmodsi_internal_er_1): Likewise.
(*divmodsi_internal, *divmoddi_internal_er): Likewise.
(*divmoddi_internal_er_1, *divmoddi_internal): Likewise.
2011-03-22 Joseph Myers <joseph@codesourcery.com> 2011-03-22 Joseph Myers <joseph@codesourcery.com>
* config/s390/s390-opts.h: New. * config/s390/s390-opts.h: New.
......
gcc/config/alpha/alpha.c
...@@ -607,7 +607,7 @@ alpha_vector_mode_supported_p (enum machine_mode mode) ...@@ -607,7 +607,7 @@ alpha_vector_mode_supported_p (enum machine_mode mode)
int int
direct_return (void) direct_return (void)
{ {
return (!TARGET_ABI_OPEN_VMS return (TARGET_ABI_OSF
&& reload_completed && reload_completed
&& alpha_sa_size () == 0 && alpha_sa_size () == 0
&& get_frame_size () == 0 && get_frame_size () == 0
...@@ -5553,7 +5553,7 @@ alpha_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) ...@@ -5553,7 +5553,7 @@ alpha_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
mem = adjust_address (m_tramp, Pmode, 24); mem = adjust_address (m_tramp, Pmode, 24);
emit_move_insn (mem, chain_value); emit_move_insn (mem, chain_value);
if (!TARGET_ABI_OPEN_VMS) if (TARGET_ABI_OSF)
{ {
emit_insn (gen_imb ()); emit_insn (gen_imb ());
#ifdef ENABLE_EXECUTE_STACK #ifdef ENABLE_EXECUTE_STACK
...@@ -8046,7 +8046,8 @@ alpha_start_function (FILE *file, const char *fnname, ...@@ -8046,7 +8046,8 @@ alpha_start_function (FILE *file, const char *fnname,
if (TARGET_ABI_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
fprintf (file, "\t.base $%d\n", vms_base_regno); fprintf (file, "\t.base $%d\n", vms_base_regno);
if (!TARGET_ABI_OPEN_VMS && TARGET_IEEE_CONFORMANT if (TARGET_ABI_OSF
&& TARGET_IEEE_CONFORMANT
&& !flag_inhibit_size_directive) && !flag_inhibit_size_directive)
{ {
/* Set flags in procedure descriptor to request IEEE-conformant /* Set flags in procedure descriptor to request IEEE-conformant
...@@ -8176,8 +8177,9 @@ alpha_expand_epilogue (void) ...@@ -8176,8 +8177,9 @@ alpha_expand_epilogue (void)
alpha_sa_mask (&imask, &fmask); alpha_sa_mask (&imask, &fmask);
fp_is_frame_pointer fp_is_frame_pointer
= ((TARGET_ABI_OPEN_VMS && alpha_procedure_type == PT_STACK) = (TARGET_ABI_OPEN_VMS
|| (!TARGET_ABI_OPEN_VMS && frame_pointer_needed)); ? alpha_procedure_type == PT_STACK
: frame_pointer_needed);
fp_offset = 0; fp_offset = 0;
sa_reg = stack_pointer_rtx; sa_reg = stack_pointer_rtx;
...@@ -8189,9 +8191,9 @@ alpha_expand_epilogue (void) ...@@ -8189,9 +8191,9 @@ alpha_expand_epilogue (void)
if (sa_size) if (sa_size)
{ {
/* If we have a frame pointer, restore SP from it. */ /* If we have a frame pointer, restore SP from it. */
if ((TARGET_ABI_OPEN_VMS if (TARGET_ABI_OPEN_VMS
&& vms_unwind_regno == HARD_FRAME_POINTER_REGNUM) ? vms_unwind_regno == HARD_FRAME_POINTER_REGNUM
|| (!TARGET_ABI_OPEN_VMS && frame_pointer_needed)) : frame_pointer_needed)
emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx); emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx);
/* Cope with very large offsets to the register save area. */ /* Cope with very large offsets to the register save area. */
...@@ -9495,7 +9497,7 @@ alpha_file_start (void) ...@@ -9495,7 +9497,7 @@ alpha_file_start (void)
fputs ("\t.set noreorder\n", asm_out_file); fputs ("\t.set noreorder\n", asm_out_file);
fputs ("\t.set volatile\n", asm_out_file); fputs ("\t.set volatile\n", asm_out_file);
if (!TARGET_ABI_OPEN_VMS) if (TARGET_ABI_OSF)
fputs ("\t.set noat\n", asm_out_file); fputs ("\t.set noat\n", asm_out_file);
if (TARGET_EXPLICIT_RELOCS) if (TARGET_EXPLICIT_RELOCS)
fputs ("\t.set nomacro\n", asm_out_file); fputs ("\t.set nomacro\n", asm_out_file);
......
gcc/config/alpha/alpha.md
...@@ -799,7 +799,7 @@ ...@@ -799,7 +799,7 @@
(clobber (reg:DI 28))]) (clobber (reg:DI 28))])
(set (match_operand:SI 0 "nonimmediate_operand" "") (set (match_operand:SI 0 "nonimmediate_operand" "")
(subreg:SI (match_dup 5) 0))] (subreg:SI (match_dup 5) 0))]
"!TARGET_ABI_OPEN_VMS" "TARGET_ABI_OSF"
{ {
operands[3] = gen_reg_rtx (DImode); operands[3] = gen_reg_rtx (DImode);
operands[4] = gen_reg_rtx (DImode); operands[4] = gen_reg_rtx (DImode);
...@@ -817,7 +817,7 @@ ...@@ -817,7 +817,7 @@
(clobber (reg:DI 28))]) (clobber (reg:DI 28))])
(set (match_operand:SI 0 "nonimmediate_operand" "") (set (match_operand:SI 0 "nonimmediate_operand" "")
(subreg:SI (match_dup 5) 0))] (subreg:SI (match_dup 5) 0))]
"!TARGET_ABI_OPEN_VMS" "TARGET_ABI_OSF"
{ {
operands[3] = gen_reg_rtx (DImode); operands[3] = gen_reg_rtx (DImode);
operands[4] = gen_reg_rtx (DImode); operands[4] = gen_reg_rtx (DImode);
...@@ -835,7 +835,7 @@ ...@@ -835,7 +835,7 @@
(clobber (reg:DI 28))]) (clobber (reg:DI 28))])
(set (match_operand:SI 0 "nonimmediate_operand" "") (set (match_operand:SI 0 "nonimmediate_operand" "")
(subreg:SI (match_dup 5) 0))] (subreg:SI (match_dup 5) 0))]
"!TARGET_ABI_OPEN_VMS" "TARGET_ABI_OSF"
{ {
operands[3] = gen_reg_rtx (DImode); operands[3] = gen_reg_rtx (DImode);
operands[4] = gen_reg_rtx (DImode); operands[4] = gen_reg_rtx (DImode);
...@@ -853,7 +853,7 @@ ...@@ -853,7 +853,7 @@
(clobber (reg:DI 28))]) (clobber (reg:DI 28))])
(set (match_operand:SI 0 "nonimmediate_operand" "") (set (match_operand:SI 0 "nonimmediate_operand" "")
(subreg:SI (match_dup 5) 0))] (subreg:SI (match_dup 5) 0))]
"!TARGET_ABI_OPEN_VMS" "TARGET_ABI_OSF"
{ {
operands[3] = gen_reg_rtx (DImode); operands[3] = gen_reg_rtx (DImode);
operands[4] = gen_reg_rtx (DImode); operands[4] = gen_reg_rtx (DImode);
...@@ -866,7 +866,7 @@ ...@@ -866,7 +866,7 @@
(match_operand:DI 2 "register_operand" ""))) (match_operand:DI 2 "register_operand" "")))
(clobber (reg:DI 23)) (clobber (reg:DI 23))
(clobber (reg:DI 28))])] (clobber (reg:DI 28))])]
"!TARGET_ABI_OPEN_VMS" "TARGET_ABI_OSF"
"") "")
(define_expand "udivdi3" (define_expand "udivdi3"
...@@ -875,7 +875,7 @@ ...@@ -875,7 +875,7 @@
(match_operand:DI 2 "register_operand" ""))) (match_operand:DI 2 "register_operand" "")))
(clobber (reg:DI 23)) (clobber (reg:DI 23))
(clobber (reg:DI 28))])] (clobber (reg:DI 28))])]
"!TARGET_ABI_OPEN_VMS" "TARGET_ABI_OSF"
"") "")
(define_expand "moddi3" (define_expand "moddi3"
...@@ -884,7 +884,7 @@ ...@@ -884,7 +884,7 @@
(match_operand:DI 2 "register_operand" ""))) (match_operand:DI 2 "register_operand" "")))
(clobber (reg:DI 23)) (clobber (reg:DI 23))
(clobber (reg:DI 28))])] (clobber (reg:DI 28))])]
"!TARGET_ABI_OPEN_VMS" "TARGET_ABI_OSF"
"") "")
(define_expand "umoddi3" (define_expand "umoddi3"
...@@ -893,7 +893,7 @@ ...@@ -893,7 +893,7 @@
(match_operand:DI 2 "register_operand" ""))) (match_operand:DI 2 "register_operand" "")))
(clobber (reg:DI 23)) (clobber (reg:DI 23))
(clobber (reg:DI 28))])] (clobber (reg:DI 28))])]
"!TARGET_ABI_OPEN_VMS" "TARGET_ABI_OSF"
"") "")
;; Lengths of 8 for ldq $t12,__divq($gp); jsr $t9,($t12),__divq as ;; Lengths of 8 for ldq $t12,__divq($gp); jsr $t9,($t12),__divq as
...@@ -906,7 +906,7 @@ ...@@ -906,7 +906,7 @@
(match_operand:DI 2 "register_operand" "b")]))) (match_operand:DI 2 "register_operand" "b")])))
(clobber (reg:DI 23)) (clobber (reg:DI 23))
(clobber (reg:DI 28))] (clobber (reg:DI 28))]
"TARGET_EXPLICIT_RELOCS && ! TARGET_ABI_OPEN_VMS" "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(parallel [(set (match_dup 0) [(parallel [(set (match_dup 0)
...@@ -951,7 +951,7 @@ ...@@ -951,7 +951,7 @@
(use (match_operand 5 "const_int_operand" "")) (use (match_operand 5 "const_int_operand" ""))
(clobber (reg:DI 23)) (clobber (reg:DI 23))
(clobber (reg:DI 28))] (clobber (reg:DI 28))]
"TARGET_EXPLICIT_RELOCS && !TARGET_ABI_OPEN_VMS" "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF"
"jsr $23,($27),__%E3%j5" "jsr $23,($27),__%E3%j5"
[(set_attr "type" "jsr") [(set_attr "type" "jsr")
(set_attr "length" "4")]) (set_attr "length" "4")])
...@@ -963,7 +963,7 @@ ...@@ -963,7 +963,7 @@
(match_operand:DI 2 "register_operand" "b")]))) (match_operand:DI 2 "register_operand" "b")])))
(clobber (reg:DI 23)) (clobber (reg:DI 23))
(clobber (reg:DI 28))] (clobber (reg:DI 28))]
"!TARGET_ABI_OPEN_VMS" "TARGET_ABI_OSF"
"%E3 %1,%2,%0" "%E3 %1,%2,%0"
[(set_attr "type" "jsr") [(set_attr "type" "jsr")
(set_attr "length" "8")]) (set_attr "length" "8")])
...@@ -975,7 +975,7 @@ ...@@ -975,7 +975,7 @@
(match_operand:DI 2 "register_operand" "b")])) (match_operand:DI 2 "register_operand" "b")]))
(clobber (reg:DI 23)) (clobber (reg:DI 23))
(clobber (reg:DI 28))] (clobber (reg:DI 28))]
"TARGET_EXPLICIT_RELOCS && ! TARGET_ABI_OPEN_VMS" "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(parallel [(set (match_dup 0) (match_dup 3)) [(parallel [(set (match_dup 0) (match_dup 3))
...@@ -1019,7 +1019,7 @@ ...@@ -1019,7 +1019,7 @@
(use (match_operand 5 "const_int_operand" "")) (use (match_operand 5 "const_int_operand" ""))
(clobber (reg:DI 23)) (clobber (reg:DI 23))
(clobber (reg:DI 28))] (clobber (reg:DI 28))]
"TARGET_EXPLICIT_RELOCS && !TARGET_ABI_OPEN_VMS" "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF"
"jsr $23,($27),__%E3%j5" "jsr $23,($27),__%E3%j5"
[(set_attr "type" "jsr") [(set_attr "type" "jsr")
(set_attr "length" "4")]) (set_attr "length" "4")])
...@@ -1031,7 +1031,7 @@ ...@@ -1031,7 +1031,7 @@
(match_operand:DI 2 "register_operand" "b")])) (match_operand:DI 2 "register_operand" "b")]))
(clobber (reg:DI 23)) (clobber (reg:DI 23))
(clobber (reg:DI 28))] (clobber (reg:DI 28))]
"!TARGET_ABI_OPEN_VMS" "TARGET_ABI_OSF"
"%E3 %1,%2,%0" "%E3 %1,%2,%0"
[(set_attr "type" "jsr") [(set_attr "type" "jsr")
(set_attr "length" "8")]) (set_attr "length" "8")])
......
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