Commit 42cb1b89 by Uros Bizjak

tree-vect-transform.c (conservative_cost_threshold): Add missing space to "not vectorized" message.

        * tree-vect-transform.c (conservative_cost_threshold): Add missing
        space to "not vectorized" message.

From-SVN: r130989
parent 0a164a3c
2007-12-16 Uros Bizjak <ubizjak@gmail.com>
* tree-vect-transform.c (conservative_cost_threshold): Add missing
space to "not vectorized" message.
2007-12-16 Richard Sandiford <rsandifo@nildram.co.uk> 2007-12-16 Richard Sandiford <rsandifo@nildram.co.uk>
PR rtl-optimization/34415 PR rtl-optimization/34415
...@@ -33,8 +38,7 @@ ...@@ -33,8 +38,7 @@
(cris_print_base): Add gcc_assert for post_inc on CRIS_ACR_REGNUM. (cris_print_base): Add gcc_assert for post_inc on CRIS_ACR_REGNUM.
(cris_print_operand) <case 'Z', case 'u'>: New cases. (cris_print_operand) <case 'Z', case 'u'>: New cases.
<case REG of case 'H'>: Allow for CRIS_SRP_REGNUM. <case REG of case 'H'>: Allow for CRIS_SRP_REGNUM.
(cris_reload_address_legitimized): Always return false for (cris_reload_address_legitimized): Always return false for TARGET_V32.
TARGET_V32.
(cris_register_move_cost): New function, guts from (cris_register_move_cost): New function, guts from
REGISTER_MOVE_COST adjusted for CRIS v32. REGISTER_MOVE_COST adjusted for CRIS v32.
(cris_normal_notice_update_cc): New function split out from... (cris_normal_notice_update_cc): New function split out from...
...@@ -67,8 +71,7 @@ ...@@ -67,8 +71,7 @@
(CRIS_SUBTARGET_DEFAULT_ARCH): New macro, MASK_AVOID_GOTPLT for (CRIS_SUBTARGET_DEFAULT_ARCH): New macro, MASK_AVOID_GOTPLT for
v32, 0 otherwise. v32, 0 otherwise.
(CRIS_CPP_SUBTARGET_SPEC, CRIS_CC1_SUBTARGET_SPEC, (CRIS_CPP_SUBTARGET_SPEC, CRIS_CC1_SUBTARGET_SPEC,
CRIS_ASM_SUBTARGET_SPEC): Adjust for different CRIS_ASM_SUBTARGET_SPEC): Adjust for different TARGET_CPU_DEFAULT.
TARGET_CPU_DEFAULT.
(CRIS_SUBTARGET_DEFAULT): Add CRIS_SUBTARGET_DEFAULT_ARCH. (CRIS_SUBTARGET_DEFAULT): Add CRIS_SUBTARGET_DEFAULT_ARCH.
* config/cris/cris.h: Sanity-check TARGET_CPU_DEFAULT for contents. * config/cris/cris.h: Sanity-check TARGET_CPU_DEFAULT for contents.
(CRIS_DEFAULT_TUNE, CRIS_ARCH_CPP_DEFAULT) (CRIS_DEFAULT_TUNE, CRIS_ARCH_CPP_DEFAULT)
...@@ -91,8 +94,8 @@ ...@@ -91,8 +94,8 @@
(REG_ALLOC_ORDER_V32): New macro. (REG_ALLOC_ORDER_V32): New macro.
(HARD_REGNO_MODE_OK): Do not allow larger-than-register-size modes (HARD_REGNO_MODE_OK): Do not allow larger-than-register-size modes
into CRIS_ACR_REGNUM. into CRIS_ACR_REGNUM.
(enum reg_class): New classes ACR_REGS, SPEC_ACR_REGS, (enum reg_class): New classes ACR_REGS, SPEC_ACR_REGS, GENNONACR_REGS
GENNONACR_REGS and SPEC_GENNONACR_REGS. and SPEC_GENNONACR_REGS.
(REG_CLASS_NAMES, REG_CLASS_CONTENTS): Adjust for new classes. (REG_CLASS_NAMES, REG_CLASS_CONTENTS): Adjust for new classes.
(REGNO_REG_CLASS): Give ACR_REGS for CRIS_ACR_REGNUM. (REGNO_REG_CLASS): Give ACR_REGS for CRIS_ACR_REGNUM.
(MODE_CODE_BASE_REG_CLASS): Define, give for OCODE POST_INC (MODE_CODE_BASE_REG_CLASS): Define, give for OCODE POST_INC
...@@ -157,8 +160,7 @@ ...@@ -157,8 +160,7 @@
("*movdi_insn_non_v32"): New pattern, replacing "*movdi_insn" and ("*movdi_insn_non_v32"): New pattern, replacing "*movdi_insn" and
define_split. define_split.
(define_split for DI move): Match CRIS v32 only. (define_split for DI move): Match CRIS v32 only.
("*movsi_got_load", "*movsi_internal", "*addi"): Adjust for CRIS ("*movsi_got_load", "*movsi_internal", "*addi"): Adjust for CRIS v32.
v32.
("load_multiple", "store_multiple", "*addsbw_v32", "*addubw_v32") ("load_multiple", "store_multiple", "*addsbw_v32", "*addubw_v32")
("*adds<mode>_v32", "*addu<mode>_v32", "*bound<mode>_v32") ("*adds<mode>_v32", "*addu<mode>_v32", "*bound<mode>_v32")
("*casesi_jump_v32", "*expanded_andsi_v32", "*expanded_andhi_v32") ("*casesi_jump_v32", "*expanded_andsi_v32", "*expanded_andhi_v32")
...@@ -186,16 +188,14 @@ ...@@ -186,16 +188,14 @@
(op-split-swapped, op-split-swapped-rx=rz): Make non-v32 only. (op-split-swapped, op-split-swapped-rx=rz): Make non-v32 only.
("dstep_mul", "xorsi3", "one_cmplsi2", "<shlr>si3") ("dstep_mul", "xorsi3", "one_cmplsi2", "<shlr>si3")
("*expanded_<shlr><mode>", "*<shlr><mode>_lowpart", "ashl<mode>3") ("*expanded_<shlr><mode>", "*<shlr><mode>_lowpart", "ashl<mode>3")
("*ashl<mode>_lowpart", "abssi2", "clzsi2", "bswapsi2", "cris_swap_bits"): Specify "noov32" for ("*ashl<mode>_lowpart", "abssi2", "clzsi2", "bswapsi2")
attr "cc". ("cris_swap_bits"): Specify "noov32" for attr "cc".
("<su>mulsi3_highpart"): Ditto. Correct operand 0 to ("<su>mulsi3_highpart"): Ditto. Correct operand 0 to register_operand.
register_operand.
("andqi3"): Make define_expand. ("andqi3"): Make define_expand.
("*return_expanded"): For attr "slottable", change from "has_slot" ("*return_expanded"): For attr "slottable", change from "has_slot"
to "has_return_slot". to "has_return_slot".
("cris_casesi_non_v32"): New pattern, old contents of "casesi". ("cris_casesi_non_v32"): New pattern, old contents of "casesi".
("casesi"): Divert into "cris_casesi_v32" and ("casesi"): Divert into "cris_casesi_v32" and "cris_casesi_non_v32".
"cris_casesi_non_v32".
(moversideqi, movemsideqi, mover2side): Require (moversideqi, movemsideqi, mover2side): Require
TARGET_SIDE_EFFECT_PREFIXES. TARGET_SIDE_EFFECT_PREFIXES.
(gotplt-to-plt, gotplt-to-plt-side): Change from CRIS_UNSPEC_PLT (gotplt-to-plt, gotplt-to-plt-side): Change from CRIS_UNSPEC_PLT
...@@ -254,7 +254,7 @@ ...@@ -254,7 +254,7 @@
2007-12-14 Uros Bizjak <ubizjak@gmail.com> 2007-12-14 Uros Bizjak <ubizjak@gmail.com>
* config/i386/sse.md (sse4_2_pcmpestr): Use reg_not_xmm0_operand * config/i386/sse.md (sse4_2_pcmpestr): Use reg_not_xmm0_operand
constraint for operand2. Use nonimm_not_xmm0_operand constraint constraint for operand 2. Use nonimm_not_xmm0_operand constraint
for operand 4. Update arguments in the call to for operand 4. Update arguments in the call to
gen_sse4_2_pcmpestr_cconly. gen_sse4_2_pcmpestr_cconly.
(sse_4_2_pcmpestr_cconly): Renumber insn operands and update insn (sse_4_2_pcmpestr_cconly): Renumber insn operands and update insn
...@@ -263,6 +263,7 @@ ...@@ -263,6 +263,7 @@
Use nonimm_not_xmm0_operand constraint for operand 3. Update Use nonimm_not_xmm0_operand constraint for operand 3. Update
arguments in the call to gen_sse4_2_pcmpistr_cconly. arguments in the call to gen_sse4_2_pcmpistr_cconly.
(sse_4_2_pcmpistr_cconly): Renumber insn operands and update insn (sse_4_2_pcmpistr_cconly): Renumber insn operands and update insn
template accordingly.
2007-12-14 Richard Guenther <rguenther@suse.de> 2007-12-14 Richard Guenther <rguenther@suse.de>
...@@ -6552,7 +6552,7 @@ conservative_cost_threshold (loop_vec_info loop_vinfo, ...@@ -6552,7 +6552,7 @@ conservative_cost_threshold (loop_vec_info loop_vinfo,
th = (unsigned) min_profitable_iters; th = (unsigned) min_profitable_iters;
if (vect_print_dump_info (REPORT_UNVECTORIZED_LOOPS)) if (vect_print_dump_info (REPORT_UNVECTORIZED_LOOPS))
fprintf (vect_dump, "not vectorized: vectorization may not be" fprintf (vect_dump, "not vectorized: vectorization may not be "
"profitable."); "profitable.");
if (th && vect_print_dump_info (REPORT_DETAILS)) if (th && vect_print_dump_info (REPORT_DETAILS))
......
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