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riscv-gcc-1
Commit 428bffcb by Peter Bergner Committed by Peter Bergner
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invoke.texi (-mcpu=power8): Document. 

	* doc/invoke.texi (-mcpu=power8): Document.
	* config.in (HAVE_AS_POWER8): New.
	* config.gcc: Add cpu_type power8.
	* configure.ac: (HAVE_AS_POWER8): Check for assembler support for
	the POWER8 instructions.
	* configure: Regenerate.
	* config/rs6000/rs6000.h: (ASM_CPU_POWER8_SPEC): Define.
	(ASM_CPU_SPEC): Pass %(asm_cpu_power8) for -mcpu=power8.
	(EXTRA_SPECS): Add asm_cpu_power8 spec string.
	* config/rs6000/rs6000-cpus.def (processor_target_table): Alias
	POWER8 to POWER7.
	* config/rs6000/rs6000-tables.opt: Regenerate.
	* config/rs6000/driver-rs6000.c (ASM_CPU_SPEC): For -mcpu=power8,
	pass %(asm_cpu_power8)/-mpwr8.
	* config/rs6000/aix53.h: Likewise.
	* config/rs6000/aix61.h: Likewise.

From-SVN: r193307
parent ca78ecf4
Showing with 108 additions and 9 deletions
gcc/ChangeLog
2012-11-07 Peter Bergner <bergner@vnet.ibm.com>
* doc/invoke.texi (-mcpu=power8): Document.
* config.in (HAVE_AS_POWER8): New.
* config.gcc: Add cpu_type power8.
* configure.ac: (HAVE_AS_POWER8): Check for assembler support for
the POWER8 instructions.
* configure: Regenerate.
* config/rs6000/rs6000.h: (ASM_CPU_POWER8_SPEC): Define.
(ASM_CPU_SPEC): Pass %(asm_cpu_power8) for -mcpu=power8.
(EXTRA_SPECS): Add asm_cpu_power8 spec string.
* config/rs6000/rs6000-cpus.def (processor_target_table): Alias
POWER8 to POWER7.
* config/rs6000/rs6000-tables.opt: Regenerate.
* config/rs6000/driver-rs6000.c (ASM_CPU_SPEC): For -mcpu=power8,
pass %(asm_cpu_power8)/-mpwr8.
* config/rs6000/aix53.h: Likewise.
* config/rs6000/aix61.h: Likewise.
2012-11-07 Uros Bizjak <ubizjak@gmail.com>
PR target/55224
gcc/config.gcc
......@@ -424,7 +424,7 @@ powerpc*-*-*)
extra_headers="ppc-asm.h altivec.h spe.h ppu_intrinsics.h paired.h spu2vmx.h vec_types.h si2vmx.h"
need_64bit_hwint=yes
case x$with_cpu in
xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[34567]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|Xe6500)
xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[345678]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|Xe6500)
cpu_is_64bit=yes
;;
esac
......@@ -3460,7 +3460,7 @@ case "${target}" in
eval "with_$which=405"
;;
"" | common \
| power | power[234567] | power6x | powerpc | powerpc64 \
| power | power[2345678] | power6x | powerpc | powerpc64 \
| rios | rios1 | rios2 | rsc | rsc1 | rs64a \
| 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \
| 476 | 476fp | 505 | 601 | 602 | 603 | 603e | ec603e \
......
gcc/config.in
......@@ -441,6 +441,12 @@
#endif
/* Define if your assembler supports POWER8 instructions. */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_POWER8
#endif
/* Define if your assembler supports .ref */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_REF
......
gcc/config/rs6000/aix53.h
......@@ -62,6 +62,7 @@ do { \
%{mcpu=power6: -mpwr6} \
%{mcpu=power6x: -mpwr6} \
%{mcpu=power7: -mpwr7} \
%{mcpu=power8: -mpwr8} \
%{mcpu=powerpc: -mppc} \
%{mcpu=rs64a: -mppc} \
%{mcpu=603: -m603} \
......
gcc/config/rs6000/aix61.h
......@@ -62,6 +62,7 @@ do { \
%{mcpu=power6: -mpwr6} \
%{mcpu=power6x: -mpwr6} \
%{mcpu=power7: -mpwr7} \
%{mcpu=power8: -mpwr8} \
%{mcpu=powerpc: -mppc} \
%{mcpu=rs64a: -mppc} \
%{mcpu=603: -m603} \
......
gcc/config/rs6000/driver-rs6000.c
......@@ -354,6 +354,7 @@ static const struct asm_name asm_names[] = {
{ "power6", "-mpwr6" },
{ "power6x", "-mpwr6" },
{ "power7", "-mpwr7" },
{ "power8", "-mpwr8" },
{ "powerpc", "-mppc" },
{ "rs64a", "-mppc" },
{ "603", "-m603" },
......@@ -379,6 +380,7 @@ static const struct asm_name asm_names[] = {
{ "power6", "%(asm_cpu_power6) -maltivec" },
{ "power6x", "%(asm_cpu_power6) -maltivec" },
{ "power7", "%(asm_cpu_power7)" },
{ "power8", "%(asm_cpu_power8)" },
{ "powerpc", "-mppc" },
{ "rs64a", "-mppc64" },
{ "401", "-mppc" },
......
gcc/config/rs6000/rs6000-cpus.def
......@@ -166,6 +166,10 @@ RS6000_CPU ("power7", PROCESSOR_POWER7, /* Don't add MASK_ISEL by default */
POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF
| MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP | MASK_POPCNTD
| MASK_VSX | MASK_RECIP_PRECISION)
RS6000_CPU ("power8", PROCESSOR_POWER7, /* Don't add MASK_ISEL by default */
POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF
| MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP | MASK_POPCNTD
| MASK_VSX | MASK_RECIP_PRECISION)
RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, MASK_PPC_GFXOPT | MASK_POWERPC64)
RS6000_CPU ("rs64", PROCESSOR_RS64A, MASK_PPC_GFXOPT | MASK_POWERPC64)
gcc/config/rs6000/rs6000-tables.opt
......@@ -177,11 +177,14 @@ EnumValue
Enum(rs6000_cpu_opt_value) String(power7) Value(49)
EnumValue
Enum(rs6000_cpu_opt_value) String(powerpc) Value(50)
Enum(rs6000_cpu_opt_value) String(power8) Value(50)
EnumValue
Enum(rs6000_cpu_opt_value) String(powerpc64) Value(51)
Enum(rs6000_cpu_opt_value) String(powerpc) Value(51)
EnumValue
Enum(rs6000_cpu_opt_value) String(rs64) Value(52)
Enum(rs6000_cpu_opt_value) String(powerpc64) Value(52)
EnumValue
Enum(rs6000_cpu_opt_value) String(rs64) Value(53)
gcc/config/rs6000/rs6000.h
......@@ -89,6 +89,12 @@
#define ASM_CPU_POWER7_SPEC "-mpower4 -maltivec"
#endif
#ifdef HAVE_AS_POWER8
#define ASM_CPU_POWER8_SPEC "-mpower8"
#else
#define ASM_CPU_POWER8_SPEC "-mpower4 -maltivec"
#endif
#ifdef HAVE_AS_DCI
#define ASM_CPU_476_SPEC "-m476"
#else
......@@ -112,6 +118,7 @@
%{mcpu=power6: %(asm_cpu_power6) -maltivec} \
%{mcpu=power6x: %(asm_cpu_power6) -maltivec} \
%{mcpu=power7: %(asm_cpu_power7)} \
%{mcpu=power8: %(asm_cpu_power8)} \
%{mcpu=a2: -ma2} \
%{mcpu=powerpc: -mppc} \
%{mcpu=rs64a: -mppc64} \
......@@ -184,6 +191,7 @@
{ "asm_cpu_power5", ASM_CPU_POWER5_SPEC }, \
{ "asm_cpu_power6", ASM_CPU_POWER6_SPEC }, \
{ "asm_cpu_power7", ASM_CPU_POWER7_SPEC }, \
{ "asm_cpu_power8", ASM_CPU_POWER8_SPEC }, \
{ "asm_cpu_476", ASM_CPU_476_SPEC }, \
SUBTARGET_EXTRA_SPECS
......
gcc/configure
......@@ -25213,6 +25213,48 @@ $as_echo "#define HAVE_AS_POPCNTD 1" >>confdefs.h
fi
case $target in
*-*-aix*) conftest_s=' .machine "pwr8"
.csect .text[PR]';;
*) conftest_s=' .machine power8
.text';;
esac
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for power8 support" >&5
$as_echo_n "checking assembler for power8 support... " >&6; }
if test "${gcc_cv_as_powerpc_power8+set}" = set; then :
$as_echo_n "(cached) " >&6
else
gcc_cv_as_powerpc_power8=no
if test $in_tree_gas = yes; then
if test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 19 \) \* 1000 + 2`
then gcc_cv_as_powerpc_power8=yes
fi
elif test x$gcc_cv_as != x; then
$as_echo "$conftest_s" > conftest.s
if { ac_try='$gcc_cv_as $gcc_cv_as_flags -a32 -o conftest.o conftest.s >&5'
{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
(eval $ac_try) 2>&5
ac_status=$?
$as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
test $ac_status = 0; }; }
then
gcc_cv_as_powerpc_power8=yes
else
echo "configure: failed program was" >&5
cat conftest.s >&5
fi
rm -f conftest.o conftest.s
fi
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_powerpc_power8" >&5
$as_echo "$gcc_cv_as_powerpc_power8" >&6; }
if test $gcc_cv_as_powerpc_power8 = yes; then
$as_echo "#define HAVE_AS_POWER8 1" >>confdefs.h
fi
case $target in
*-*-aix*) conftest_s=' .csect .text[PR]
lwsync';;
*) conftest_s=' .text
......
gcc/configure.ac
......@@ -3864,6 +3864,19 @@ LCF0:
[Define if your assembler supports POPCNTD instructions.])])
case $target in
*-*-aix*) conftest_s=' .machine "pwr8"
.csect .text[[PR]]';;
*) conftest_s=' .machine power8
.text';;
esac
gcc_GAS_CHECK_FEATURE([power8 support],
gcc_cv_as_powerpc_power8, [2,19,2], -a32,
[$conftest_s],,
[AC_DEFINE(HAVE_AS_POWER8, 1,
[Define if your assembler supports POWER8 instructions.])])
case $target in
*-*-aix*) conftest_s=' .csect .text[[PR]]
lwsync';;
*) conftest_s=' .text
......
gcc/doc/invoke.texi
......@@ -17101,7 +17101,7 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403},
@samp{e300c3}, @samp{e500mc}, @samp{e500mc64}, @samp{e5500},
@samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5},
@samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
@samp{power6}, @samp{power6x}, @samp{power7}, @samp{powerpc},
@samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8}, @samp{powerpc},
@samp{powerpc64}, and @samp{rs64}.
@option{-mcpu=powerpc}, and @option{-mcpu=powerpc64} specify pure 32-bit
......@@ -17903,9 +17903,9 @@ which handle the double-precision reciprocal square root calculations.
@opindex mrecip-precision
Assume (do not assume) that the reciprocal estimate instructions
provide higher-precision estimates than is mandated by the PowerPC
ABI. Selecting @option{-mcpu=power6} or @option{-mcpu=power7}
automatically selects @option{-mrecip-precision}. The double-precision
square root estimate instructions are not generated by
ABI. Selecting @option{-mcpu=power6}, @option{-mcpu=power7} or
@option{-mcpu=power8} automatically selects @option{-mrecip-precision}.
The double-precision square root estimate instructions are not generated by
default on low-precision machines, since they do not provide an
estimate that converges after three steps.
......
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