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lvzhengyang
riscv-gcc-1
Commits
428be702
Commit
428be702
authored
Mar 24, 1998
by
Richard Kenner
Committed by
Jeff Law
Mar 24, 1998
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* pa.c (emit_move_sequence): If in reload, call find_replacement.
From-SVN: r18812
parent
d275726b
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gcc/ChangeLog
View file @
428be702
Wed Mar 25 00:57:26 1998 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
* pa.c (emit_move_sequence): If in reload, call find_replacement.
Tue Mar 24 10:44:11 1998 Nick Clifton <nickc@cygnus.com>
Tue Mar 24 10:44:11 1998 Nick Clifton <nickc@cygnus.com>
* Makefile.in (gcov$(exeext)): Support .exe extension to gcov.
* Makefile.in (gcov$(exeext)): Support .exe extension to gcov.
...
...
gcc/config/pa/pa.c
View file @
428be702
...
@@ -1074,6 +1074,7 @@ emit_move_sequence (operands, mode, scratch_reg)
...
@@ -1074,6 +1074,7 @@ emit_move_sequence (operands, mode, scratch_reg)
{
{
register
rtx
operand0
=
operands
[
0
];
register
rtx
operand0
=
operands
[
0
];
register
rtx
operand1
=
operands
[
1
];
register
rtx
operand1
=
operands
[
1
];
register
rtx
tem
;
if
(
reload_in_progress
&&
GET_CODE
(
operand0
)
==
REG
if
(
reload_in_progress
&&
GET_CODE
(
operand0
)
==
REG
&&
REGNO
(
operand0
)
>=
FIRST_PSEUDO_REGISTER
)
&&
REGNO
(
operand0
)
>=
FIRST_PSEUDO_REGISTER
)
...
@@ -1097,6 +1098,15 @@ emit_move_sequence (operands, mode, scratch_reg)
...
@@ -1097,6 +1098,15 @@ emit_move_sequence (operands, mode, scratch_reg)
operand1
=
alter_subreg
(
operand1
);
operand1
=
alter_subreg
(
operand1
);
}
}
if
(
reload_in_progress
&&
GET_CODE
(
operand0
)
==
MEM
&&
((
tem
=
find_replacement
(
&
XEXP
(
operand0
,
0
)))
!=
XEXP
(
operand0
,
0
)))
operand0
=
gen_rtx
(
MEM
,
GET_MODE
(
operand0
),
tem
);
if
(
reload_in_progress
&&
GET_CODE
(
operand1
)
==
MEM
&&
((
tem
=
find_replacement
(
&
XEXP
(
operand1
,
0
)))
!=
XEXP
(
operand1
,
0
)))
operand1
=
gen_rtx
(
MEM
,
GET_MODE
(
operand1
),
tem
);
/* Handle secondary reloads for loads/stores of FP registers from
/* Handle secondary reloads for loads/stores of FP registers from
REG+D addresses where D does not fit in 5 bits, including
REG+D addresses where D does not fit in 5 bits, including
(subreg (mem (addr))) cases. */
(subreg (mem (addr))) cases. */
...
...
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