Commit 4246e0c5 by Jeff Law

mn10300.c (expand_epilogue): Restore registers in the "ret" instruction instead…

mn10300.c (expand_epilogue): Restore registers in the "ret" instruction instead of a separate movm instruction.

        * mn10300/mn10300.c (expand_epilogue): Restore registers in the
        "ret" instruction instead of a separate movm instruction.
        Support possible stack deallocation in "ret" instruction too.
        * mn10300.md (return_internal): Use "ret" instead of "rets";
        restore registers and deallocate stack as needed.
        (load_movm): Delete unused pattern.

        * mn10300/mn10300.h (SMALL_REGISTER_CLASSES): Define.

From-SVN: r13311
parent 58d1a582
...@@ -244,17 +244,18 @@ expand_epilogue () ...@@ -244,17 +244,18 @@ expand_epilogue ()
frame_pointer_rtx, frame_pointer_rtx,
GEN_INT (-20))); GEN_INT (-20)));
emit_move_insn (stack_pointer_rtx, frame_pointer_rtx); emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
size = 0;
}
else if (size > 255)
{
emit_insn (gen_addsi3 (stack_pointer_rtx,
stack_pointer_rtx,
GEN_INT (size)));
size = 0;
} }
else if (size)
emit_insn (gen_addsi3 (stack_pointer_rtx,
stack_pointer_rtx,
GEN_INT (size)));
/* And restore the registers. */
emit_insn (gen_load_movm ());
/* And return. */ /* Deallocate remaining stack, restore registers and return. And return. */
emit_jump_insn (gen_return_internal ()); emit_jump_insn (gen_return_internal (GEN_INT (size)));
} }
/* Update the condition code from the insn. */ /* Update the condition code from the insn. */
......
...@@ -177,6 +177,9 @@ extern int target_flags; ...@@ -177,6 +177,9 @@ extern int target_flags;
#define MODES_TIEABLE_P(MODE1, MODE2) \ #define MODES_TIEABLE_P(MODE1, MODE2) \
(MODE1 == MODE2 || GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4) (MODE1 == MODE2 || GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4)
/* 4 data, and effectively 3 address registers is small as far as I'm
concerned. */
#define SMALL_REGISTER_CLASSES 1
/* Define the classes of registers for register constraints in the /* Define the classes of registers for register constraints in the
machine description. Also define ranges of constants. machine description. Also define ranges of constants.
......
...@@ -655,11 +655,14 @@ ...@@ -655,11 +655,14 @@
"rets" "rets"
[(set_attr "cc" "clobber")]) [(set_attr "cc" "clobber")])
;; This insn restores the callee saved registers and does a return, it
;; can also deallocate stack space.
(define_insn "return_internal" (define_insn "return_internal"
[(const_int 0) [(const_int 0)
(match_operand:SI 0 "const_int_operand" "i")
(return)] (return)]
"" ""
"rets" "ret [d2,d3,a2,a3],%0"
[(set_attr "cc" "clobber")]) [(set_attr "cc" "clobber")])
(define_insn "store_movm" (define_insn "store_movm"
...@@ -667,9 +670,3 @@ ...@@ -667,9 +670,3 @@
"" ""
"movm [d2,d3,a2,a3],(sp)" "movm [d2,d3,a2,a3],(sp)"
[(set_attr "cc" "none")]) [(set_attr "cc" "none")])
(define_insn "load_movm"
[(const_int 2)]
""
"movm (sp),[d2,d3,a2,a3]"
[(set_attr "cc" "none")])
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