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riscv-gcc-1
Commit 42201282 by J"orn Rennecke Committed by Kaz Kojima
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sh.h (CONST_OK_FOR_K16): Define. 

	* config/sh/sh.h (CONST_OK_FOR_K16): Define.
	(CONST_OK_FOR_K): Add CONST_OK_FOR_K16 case.
	(EXTRA_CONSTRAINT_C16): Remove.
	(EXTRA_CONSTRAINT_Css, EXTRA_CONSTRAINT_Csu): Define.
	(EXTRA_CONSTRAINT_C): Remove EXTRA_CONSTRAINT_C16 case and add
	EXTRA_CONSTRAINT_Css and EXTRA_CONSTRAINT_Csu cases.
	* config/sh/sh.c (print_operand): Handle unsigned 16-bit symbolic
	constants of SHmedia.  Handle nested constant expressions of
	SHmedia correctly.
	(andcosts): Fix the costs for SHmedia constants.
	(sh_rtx_costs): Take account of outer_code for SHmedia constants.
	* config/sh/sh.md (*movsi_media): Use Css constraint instead of C16.
	(*movsi_media_nofpu, *movqi_media, *movhi_media): Likewise.
	(*movdi_media, *movdi_media_nofpu, movv8qi_i, movv2hi_i): Likewise.
	(movv4hi_i, movv2si_i):	Likewise.
	(movsi_const): Adjust the second operand of ior so to match with
	the Csu constraint.
	(movdi_const, movdi_const_32bit): Likewise.
	(movdi_const_16bit+1): Don't sign-extend LOW.
	(movdi_const_16bit+2): Likewise.  Remove the zero_extend and truncate
	step.
	(*double_shori): Fix the split condition.  Use GEN_INT instead
	of get_int_mode calls.  Mask lower 16-bit of the argument of
	the last GEN_INT.
	(sym2GOTPLT): Remove.
	(symGOTPLT2reg): Replace gen_sym2GOTPLT with gen_rtx_CONST and
	gen_rtx_UNSPEC.
	* config/sh/predicates.md (arith_operand): Use EXTRA_CONSTRAINT_Css
	instead of EXTRA_CONSTRAINT_C16.


Co-Authored-By: Kaz Kojima <kkojima@gcc.gnu.org>

From-SVN: r109471
parent 8b47b2d6
Showing with 133 additions and 98 deletions
gcc/ChangeLog
2006-01-08 J"orn Rennecke <joern.rennecke@st.com>
Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.h (CONST_OK_FOR_K16): Define.
(CONST_OK_FOR_K): Add CONST_OK_FOR_K16 case.
(EXTRA_CONSTRAINT_C16): Remove.
(EXTRA_CONSTRAINT_Css, EXTRA_CONSTRAINT_Csu): Define.
(EXTRA_CONSTRAINT_C): Remove EXTRA_CONSTRAINT_C16 case and add
EXTRA_CONSTRAINT_Css and EXTRA_CONSTRAINT_Csu cases.
* config/sh/sh.c (print_operand): Handle unsigned 16-bit symbolic
constants of SHmedia. Handle nested constant expressions of
SHmedia correctly.
(andcosts): Fix the costs for SHmedia constants.
(sh_rtx_costs): Take account of outer_code for SHmedia constants.
* config/sh/sh.md (*movsi_media): Use Css constraint instead of C16.
(*movsi_media_nofpu, *movqi_media, *movhi_media): Likewise.
(*movdi_media, *movdi_media_nofpu, movv8qi_i, movv2hi_i): Likewise.
(movv4hi_i, movv2si_i): Likewise.
(movsi_const): Adjust the second operand of ior so to match with
the Csu constraint.
(movdi_const, movdi_const_32bit): Likewise.
(movdi_const_16bit+1): Don't sign-extend LOW.
(movdi_const_16bit+2): Likewise. Remove the zero_extend and truncate
step.
(*double_shori): Fix the split condition. Use GEN_INT instead
of get_int_mode calls. Mask lower 16-bit of the argument of
the last GEN_INT.
(sym2GOTPLT): Remove.
(symGOTPLT2reg): Replace gen_sym2GOTPLT with gen_rtx_CONST and
gen_rtx_UNSPEC.
* config/sh/predicates.md (arith_operand): Use EXTRA_CONSTRAINT_Css
instead of EXTRA_CONSTRAINT_C16.
2005-01-07 Ian Lance Taylor <ian@airs.com>
David Edelsohn <edelsohn@gnu.org>
......
gcc/config/sh/predicates.md
;; Predicate definitions for Renesas / SuperH SH.
;; Copyright (C) 2005 Free Software Foundation, Inc.
;; Copyright (C) 2005, 2006 Free Software Foundation, Inc.
;;
;; This file is part of GCC.
;;
......@@ -111,7 +111,7 @@
same register from literal constants into a set and an add,
when the difference is too wide for an add. */
if (GET_CODE (op) == CONST_INT
|| EXTRA_CONSTRAINT_C16 (op))
|| EXTRA_CONSTRAINT_Css (op))
return 1;
else if (GET_CODE (op) == TRUNCATE
&& ! system_reg_operand (XEXP (op, 0), VOIDmode)
......
gcc/config/sh/sh.c
/* Output routines for GCC for Renesas / SuperH SH.
Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
2003, 2004, 2005 Free Software Foundation, Inc.
2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Contributed by Steve Chamberlain (sac@cygnus.com).
Improved by Jim Wilson (wilson@cygnus.com).
......@@ -976,35 +976,38 @@ print_operand (FILE *stream, rtx x, int code)
case CONST:
if (TARGET_SHMEDIA
&& GET_CODE (XEXP (x, 0)) == SIGN_EXTEND
&& (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND
|| GET_CODE (XEXP (x, 0)) == ZERO_EXTEND)
&& (GET_MODE (XEXP (x, 0)) == DImode
|| GET_MODE (XEXP (x, 0)) == SImode)
&& GET_CODE (XEXP (XEXP (x, 0), 0)) == TRUNCATE
&& GET_MODE (XEXP (XEXP (x, 0), 0)) == HImode)
{
rtx val = XEXP (XEXP (XEXP (x, 0), 0), 0);
rtx val2 = val;
bool nested_expr = false;
fputc ('(', stream);
if (GET_CODE (val) == ASHIFTRT)
{
fputc ('(', stream);
if (GET_CODE (XEXP (val, 0)) == CONST)
fputc ('(', stream);
output_addr_const (stream, XEXP (val, 0));
if (GET_CODE (XEXP (val, 0)) == CONST)
fputc (')', stream);
val2 = XEXP (val, 0);
}
if (GET_CODE (val2) == CONST
|| GET_RTX_CLASS (GET_CODE (val2)) != RTX_OBJ)
{
fputc ('(', stream);
nested_expr = true;
}
output_addr_const (stream, val2);
if (nested_expr)
fputc (')', stream);
if (GET_CODE (val) == ASHIFTRT)
{
fputs (" >> ", stream);
output_addr_const (stream, XEXP (val, 1));
fputc (')', stream);
}
else
{
if (GET_CODE (val) == CONST)
fputc ('(', stream);
output_addr_const (stream, val);
if (GET_CODE (val) == CONST)
fputc (')', stream);
}
fputs (" & 65535)", stream);
break;
}
......@@ -1971,12 +1974,12 @@ andcosts (rtx x)
if (TARGET_SHMEDIA)
{
if ((GET_CODE (XEXP (x, 1)) == CONST_INT
&& CONST_OK_FOR_I16 (INTVAL (XEXP (x, 1))))
|| EXTRA_CONSTRAINT_C16 (XEXP (x, 1)))
if (GET_CODE (XEXP (x, 1)) == CONST_INT
&& (CONST_OK_FOR_I10 (INTVAL (XEXP (x, 1)))
|| CONST_OK_FOR_J16 (INTVAL (XEXP (x, 1)))))
return 1;
else
return 2;
return 1 + rtx_cost (XEXP (x, 1), AND);
}
/* These constants are single cycle extu.[bw] instructions. */
......@@ -2096,9 +2099,9 @@ sh_rtx_costs (rtx x, int code, int outer_code, int *total)
else if (CONST_OK_FOR_I16 (INTVAL (x) >> 16))
*total = COSTS_N_INSNS ((outer_code != SET) + 1);
else if (CONST_OK_FOR_I16 ((INTVAL (x) >> 16) >> 16))
*total = COSTS_N_INSNS (3);
*total = COSTS_N_INSNS ((outer_code != SET) + 2);
else
*total = COSTS_N_INSNS (4);
*total = COSTS_N_INSNS ((outer_code != SET) + 3);
return true;
}
if (CONST_OK_FOR_I08 (INTVAL (x)))
......
gcc/config/sh/sh.h
/* Definitions of target machine for GNU compiler for Renesas / SuperH SH.
Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
2003, 2004, 2005 Free Software Foundation, Inc.
2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Contributed by Steve Chamberlain (sac@cygnus.com).
Improved by Jim Wilson (wilson@cygnus.com).
......@@ -1493,7 +1493,8 @@ extern enum reg_class reg_class_from_letter[];
Bsc: SCRATCH - for the scratch register in movsi_ie in the
fldi0 / fldi0 cases
C: Constants other than only CONST_INT (constraint len == 3)
C16: 16 bit constant, literal or symbolic
Css: signed 16 bit constant, literal or symbolic
Csu: unsigned 16 bit constant, literal or symbolic
Csy: label or symbol
Cpg: non-explicit constants that can be directly loaded into a general
purpose register in PIC code. like 's' except we don't allow
......@@ -1527,7 +1528,8 @@ extern enum reg_class reg_class_from_letter[];
C is the letter, and VALUE is a constant value.
Return 1 if VALUE is in the range specified by C.
I08: arithmetic operand -127..128, as used in add, sub, etc
I16: arithmetic operand -32768..32767, as used in SHmedia movi and shori
I16: arithmetic operand -32768..32767, as used in SHmedia movi
K16: arithmetic operand 0..65535, as used in SHmedia shori
P27: shift operand 1,2,8 or 16
K08: logical operand 0..255, as used in and, or, etc.
M: constant 1
......@@ -1564,8 +1566,11 @@ extern enum reg_class reg_class_from_letter[];
#define CONST_OK_FOR_K08(VALUE) (((HOST_WIDE_INT)(VALUE))>= 0 \
&& ((HOST_WIDE_INT)(VALUE)) <= 255)
#define CONST_OK_FOR_K16(VALUE) (((HOST_WIDE_INT)(VALUE))>= 0 \
&& ((HOST_WIDE_INT)(VALUE)) <= 65535)
#define CONST_OK_FOR_K(VALUE, STR) \
((STR)[1] == '0' && (STR)[2] == '8' ? CONST_OK_FOR_K08 (VALUE) \
: (STR)[1] == '1' && (STR)[2] == '6' ? CONST_OK_FOR_K16 (VALUE) \
: 0)
#define CONST_OK_FOR_P27(VALUE) \
((VALUE)==1||(VALUE)==2||(VALUE)==8||(VALUE)==16)
......@@ -2312,8 +2317,8 @@ struct sh_args {
((STR)[1] == 's' && (STR)[2] == 'c' ? EXTRA_CONSTRAINT_Bsc (OP) \
: 0)
/* The `C16' constraint is a 16-bit constant, literal or symbolic. */
#define EXTRA_CONSTRAINT_C16(OP) \
/* The `Css' constraint is a signed 16-bit constant, literal or symbolic. */
#define EXTRA_CONSTRAINT_Css(OP) \
(GET_CODE (OP) == CONST \
&& GET_CODE (XEXP ((OP), 0)) == SIGN_EXTEND \
&& (GET_MODE (XEXP ((OP), 0)) == DImode \
......@@ -2327,6 +2332,21 @@ struct sh_args {
&& GET_CODE (XEXP (XEXP (XEXP (XEXP ((OP), 0), 0), 0), \
1)) == CONST_INT)))
/* The `Csu' constraint is an unsigned 16-bit constant, literal or symbolic. */
#define EXTRA_CONSTRAINT_Csu(OP) \
(GET_CODE (OP) == CONST \
&& GET_CODE (XEXP ((OP), 0)) == ZERO_EXTEND \
&& (GET_MODE (XEXP ((OP), 0)) == DImode \
|| GET_MODE (XEXP ((OP), 0)) == SImode) \
&& GET_CODE (XEXP (XEXP ((OP), 0), 0)) == TRUNCATE \
&& GET_MODE (XEXP (XEXP ((OP), 0), 0)) == HImode \
&& (MOVI_SHORI_BASE_OPERAND_P (XEXP (XEXP (XEXP ((OP), 0), 0), 0)) \
|| (GET_CODE (XEXP (XEXP (XEXP ((OP), 0), 0), 0)) == ASHIFTRT \
&& (MOVI_SHORI_BASE_OPERAND_P \
(XEXP (XEXP (XEXP (XEXP ((OP), 0), 0), 0), 0))) \
&& GET_CODE (XEXP (XEXP (XEXP (XEXP ((OP), 0), 0), 0), \
1)) == CONST_INT)))
/* Check whether OP is a datalabel unspec. */
#define DATALABEL_REF_NO_CONST_P(OP) \
(GET_CODE (OP) == UNSPEC \
......@@ -2413,7 +2433,8 @@ struct sh_args {
&& (! PIC_ADDR_P (OP) || PIC_OFFSET_P (OP)) \
&& GET_CODE (OP) != LABEL_REF)))
#define EXTRA_CONSTRAINT_C(OP, STR) \
((STR)[1] == '1' && (STR)[2] == '6' ? EXTRA_CONSTRAINT_C16 (OP) \
((STR)[1] == 's' && (STR)[2] == 's' ? EXTRA_CONSTRAINT_Css (OP) \
: (STR)[1] == 's' && (STR)[2] == 'u' ? EXTRA_CONSTRAINT_Csu (OP) \
: (STR)[1] == 's' && (STR)[2] == 'y' ? EXTRA_CONSTRAINT_Csy (OP) \
: (STR)[1] == 'p' && (STR)[2] == 'g' ? EXTRA_CONSTRAINT_Cpg (OP) \
: 0)
......
gcc/config/sh/sh.md
;;- Machine description for Renesas / SuperH SH.
;; Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
;; 2003, 2004, 2005 Free Software Foundation, Inc.
;; 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
;; Contributed by Steve Chamberlain (sac@cygnus.com).
;; Improved by Jim Wilson (wilson@cygnus.com).
......@@ -4844,7 +4844,7 @@ label:
[(set (match_operand:SI 0 "general_movdst_operand"
"=r,r,r,r,m,f?,m,f?,r,f?,*b,r,b")
(match_operand:SI 1 "general_movsrc_operand"
"r,I16C16,nCpg,m,rZ,m,f?,rZ,f?,f?,r,*b,Csy"))]
"r,I16Css,nCpg,m,rZ,m,f?,rZ,f?,f?,r,*b,Csy"))]
"TARGET_SHMEDIA_FPU
&& (register_operand (operands[0], SImode)
|| sh_register_operand (operands[1], SImode)
......@@ -4874,7 +4874,7 @@ label:
[(set (match_operand:SI 0 "general_movdst_operand"
"=r,r,r,r,m,*b,r,*b")
(match_operand:SI 1 "general_movsrc_operand"
"r,I16C16,nCpg,m,rZ,r,*b,Csy"))]
"r,I16Css,nCpg,m,rZ,r,*b,Csy"))]
"TARGET_SHMEDIA
&& (register_operand (operands[0], SImode)
|| sh_register_operand (operands[1], SImode)
......@@ -4904,11 +4904,9 @@ label:
(const_int 16))))))
(set (match_dup 0)
(ior:SI (ashift:SI (match_dup 0) (const_int 16))
(zero_extend:SI
(truncate:HI
(const:SI
(sign_extend:SI
(truncate:HI (match_dup 1))))))))]
(const:SI
(zero_extend:SI
(truncate:HI (match_dup 1))))))]
"TARGET_SHMEDIA && reload_completed
&& MOVI_SHORI_BASE_OPERAND_P (operands[1])"
"
......@@ -5092,7 +5090,7 @@ label:
(define_insn "*movqi_media"
[(set (match_operand:QI 0 "general_movdst_operand" "=r,r,r,m")
(match_operand:QI 1 "general_movsrc_operand" "r,I16C16,m,rZ"))]
(match_operand:QI 1 "general_movsrc_operand" "r,I16Css,m,rZ"))]
"TARGET_SHMEDIA
&& (arith_reg_operand (operands[0], QImode)
|| extend_reg_or_0_operand (operands[1], QImode))"
......@@ -5153,7 +5151,7 @@ label:
(define_insn "*movhi_media"
[(set (match_operand:HI 0 "general_movdst_operand" "=r,r,r,r,m")
(match_operand:HI 1 "general_movsrc_operand" "r,I16C16,n,m,rZ"))]
(match_operand:HI 1 "general_movsrc_operand" "r,I16Css,n,m,rZ"))]
"TARGET_SHMEDIA
&& (arith_reg_operand (operands[0], HImode)
|| arith_reg_or_0_operand (operands[1], HImode))"
......@@ -5272,7 +5270,7 @@ label:
[(set (match_operand:DI 0 "general_movdst_operand"
"=r,r,r,rl,m,f?,m,f?,r,f?,*b,r,*b")
(match_operand:DI 1 "general_movsrc_operand"
"r,I16C16,nCpgF,m,rlZ,m,f?,rZ,f?,f?,r,*b,Csy"))]
"r,I16Css,nCpgF,m,rlZ,m,f?,rZ,f?,f?,r,*b,Csy"))]
"TARGET_SHMEDIA_FPU
&& (register_operand (operands[0], DImode)
|| sh_register_operand (operands[1], DImode))"
......@@ -5295,7 +5293,7 @@ label:
(define_insn "*movdi_media_nofpu"
[(set (match_operand:DI 0 "general_movdst_operand" "=r,r,r,rl,m,*b,r,*b");
(match_operand:DI 1 "general_movsrc_operand" "r,I16C16,nCpgF,m,rlZ,r,*b,Csy"))]
(match_operand:DI 1 "general_movsrc_operand" "r,I16Css,nCpgF,m,rlZ,r,*b,Csy"))]
"TARGET_SHMEDIA
&& (register_operand (operands[0], DImode)
|| sh_register_operand (operands[1], DImode))"
......@@ -5349,32 +5347,26 @@ label:
(const_int 48))))))
(set (match_dup 0)
(ior:DI (ashift:DI (match_dup 0) (const_int 16))
(zero_extend:DI
(truncate:HI
(const:DI
(sign_extend:DI
(truncate:HI
(ashiftrt:SI
(match_dup 1)
(const_int 32)))))))))
(const:DI
(zero_extend:DI
(truncate:HI
(ashiftrt:SI
(match_dup 1)
(const_int 32)))))))
(set (match_dup 0)
(ior:DI (ashift:DI (match_dup 0) (const_int 16))
(zero_extend:DI
(truncate:HI
(const:DI
(sign_extend:DI
(truncate:HI
(ashiftrt:SI
(match_dup 1)
(const_int 16)))))))))
(const:DI
(zero_extend:DI
(truncate:HI
(ashiftrt:SI
(match_dup 1)
(const_int 16)))))))
(set (match_dup 0)
(ior:DI (ashift:DI (match_dup 0) (const_int 16))
(zero_extend:DI
(truncate:HI
(const:DI
(sign_extend:DI
(truncate:HI
(match_dup 1))))))))]
(const:DI
(zero_extend:DI
(truncate:HI
(match_dup 1))))))]
"TARGET_SHMEDIA64 && reload_completed
&& MOVI_SHORI_BASE_OPERAND_P (operands[1])"
"
......@@ -5391,12 +5383,10 @@ label:
(const_int 16))))))
(set (match_dup 0)
(ior:DI (ashift:DI (match_dup 0) (const_int 16))
(zero_extend:DI
(truncate:HI
(const:DI
(sign_extend:DI
(truncate:HI
(match_dup 1))))))))]
(const:DI
(zero_extend:DI
(truncate:HI
(match_dup 1))))))]
"TARGET_SHMEDIA32 && reload_completed
&& MOVI_SHORI_BASE_OPERAND_P (operands[1])"
"
......@@ -5429,10 +5419,8 @@ label:
unsigned HOST_WIDE_INT sign;
unsigned HOST_WIDE_INT val2 = val ^ (val-1);
/* Sign-extend the 16 least-significant bits. */
/* Zero-extend the 16 least-significant bits. */
low &= 0xffff;
low ^= 0x8000;
low -= 0x8000;
/* Arithmetic shift right the word by 16 bits. */
high >>= 16;
......@@ -5529,8 +5517,7 @@ label:
&& GET_CODE (operands[1]) == CONST_DOUBLE"
[(set (match_dup 0) (match_dup 2))
(set (match_dup 0)
(ior:DI (ashift:DI (match_dup 0) (const_int 16))
(zero_extend:DI (truncate:HI (match_dup 1)))))]
(ior:DI (ashift:DI (match_dup 0) (const_int 16)) (match_dup 1)))]
"
{
unsigned HOST_WIDE_INT low = CONST_DOUBLE_LOW (operands[1]);
......@@ -5538,10 +5525,8 @@ label:
unsigned HOST_WIDE_INT val = low;
unsigned HOST_WIDE_INT sign;
/* Sign-extend the 16 least-significant bits. */
/* Zero-extend the 16 least-significant bits. */
val &= 0xffff;
val ^= 0x8000;
val -= 0x8000;
operands[1] = GEN_INT (val);
/* Arithmetic shift right the double-word by 16 bits. */
......@@ -5566,9 +5551,7 @@ label:
[(set (match_operand:DI 0 "ext_dest_operand" "=r,r")
(ior:DI (ashift:DI (match_operand:DI 1 "arith_reg_operand" "0,0")
(const_int 16))
(zero_extend:DI
(truncate:HI
(match_operand:DI 2 "immediate_operand" "I16C16,nF")))))]
(match_operand:DI 2 "immediate_operand" "K16Csu,nF")))]
"TARGET_SHMEDIA && (reload_completed || arith_reg_dest (operands[0], DImode))"
"@
shori %u2, %0
......@@ -5579,9 +5562,7 @@ label:
[(set (match_operand:SI 0 "arith_reg_dest" "=r")
(ior:SI (ashift:SI (match_operand:SI 1 "arith_reg_operand" "0")
(const_int 16))
(zero_extend:SI
(truncate:HI
(match_operand:SI 2 "immediate_operand" "I16C16")))))]
(match_operand:SI 2 "immediate_operand" "K16Csu")))]
"TARGET_SHMEDIA"
"shori %u2, %0")
......@@ -8315,17 +8296,16 @@ label:
DONE;
}")
(define_expand "sym2GOTPLT"
[(const (unspec [(match_operand 0 "" "")] UNSPEC_GOTPLT))]
""
"")
(define_expand "symGOTPLT2reg"
[(match_operand 0 "" "") (match_operand 1 "" "")]
""
"
{
emit_insn (gen_symGOT_load (operands[0], gen_sym2GOTPLT (operands[1])));
rtx pltsym = gen_rtx_CONST (Pmode,
gen_rtx_UNSPEC (Pmode,
gen_rtvec (1, operands[1]),
UNSPEC_GOTPLT));
emit_insn (gen_symGOT_load (operands[0], pltsym));
DONE;
}")
......@@ -11260,7 +11240,7 @@ mov.l\\t1f,r0\\n\\
(define_insn "movv8qi_i"
[(set (match_operand:V8QI 0 "general_movdst_operand" "=r,r,r,rl,m")
(match_operand:V8QI 1 "general_movsrc_operand" "r,I16C16Z,nW,m,rlZ"))]
(match_operand:V8QI 1 "general_movsrc_operand" "r,I16CssZ,nW,m,rlZ"))]
"TARGET_SHMEDIA
&& (register_operand (operands[0], V8QImode)
|| sh_register_operand (operands[1], V8QImode))"
......@@ -11352,7 +11332,7 @@ mov.l\\t1f,r0\\n\\
(define_insn "movv2hi_i"
[(set (match_operand:V2HI 0 "general_movdst_operand" "=r,r,r,rl,m")
(match_operand:V2HI 1 "general_movsrc_operand" "r,I16C16Z,nW,m,rlZ"))]
(match_operand:V2HI 1 "general_movsrc_operand" "r,I16CssZ,nW,m,rlZ"))]
"TARGET_SHMEDIA
&& (register_operand (operands[0], V2HImode)
|| sh_register_operand (operands[1], V2HImode))"
......@@ -11377,7 +11357,7 @@ mov.l\\t1f,r0\\n\\
(define_insn "movv4hi_i"
[(set (match_operand:V4HI 0 "general_movdst_operand" "=r,r,r,rl,m")
(match_operand:V4HI 1 "general_movsrc_operand" "r,I16C16Z,nW,m,rlZ"))]
(match_operand:V4HI 1 "general_movsrc_operand" "r,I16CssZ,nW,m,rlZ"))]
"TARGET_SHMEDIA
&& (register_operand (operands[0], V4HImode)
|| sh_register_operand (operands[1], V4HImode))"
......@@ -11399,7 +11379,7 @@ mov.l\\t1f,r0\\n\\
(define_insn "movv2si_i"
[(set (match_operand:V2SI 0 "general_movdst_operand" "=r,r,r,rl,m")
(match_operand:V2SI 1 "general_movsrc_operand" "r,I16C16Z,nW,m,rlZ"))]
(match_operand:V2SI 1 "general_movsrc_operand" "r,I16CssZ,nW,m,rlZ"))]
"TARGET_SHMEDIA
&& (register_operand (operands[0], V2SImode)
|| sh_register_operand (operands[1], V2SImode))"
......@@ -12345,7 +12325,7 @@ mov.l\\t1f,r0\\n\\
(const_int 32))
(match_operand:DI 2 "const_int_operand" "n")))]
"TARGET_SHMEDIA
&& INTVAL (operands[2]) == trunc_int_for_mode (INTVAL (operands[2]), SImode)"
&& ! (INTVAL (operands[2]) & ~(unsigned HOST_WIDE_INT) 0xffffffffUL)"
"#"
"rtx_equal_p (operands[0], operands[1])"
[(const_int 0)]
......@@ -12353,10 +12333,8 @@ mov.l\\t1f,r0\\n\\
{
HOST_WIDE_INT v = INTVAL (operands[2]);
emit_insn (gen_shori_media (operands[0], operands[0],
gen_int_mode (INTVAL (operands[2]) >> 16, HImode)));
emit_insn (gen_shori_media (operands[0], operands[0],
gen_int_mode (v, HImode)));
emit_insn (gen_shori_media (operands[0], operands[0], GEN_INT (v >> 16)));
emit_insn (gen_shori_media (operands[0], operands[0], GEN_INT (v & 65535)));
DONE;
}"
[(set_attr "highpart" "ignore")])
......
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