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riscv-gcc-1
Commit 41e1a7ff by Srinath Parvathaneni Committed by Kyrylo Tkachov
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[ARM][GCC][2/8x]: MVE ACLE gather load and scatter store intrinsics with writeback. 

This patch supports following MVE ACLE intrinsics with writeback.

vldrdq_gather_base_wb_s64, vldrdq_gather_base_wb_u64, vldrdq_gather_base_wb_z_s64,
vldrdq_gather_base_wb_z_u64, vldrwq_gather_base_wb_f32, vldrwq_gather_base_wb_s32,
vldrwq_gather_base_wb_u32, vldrwq_gather_base_wb_z_f32, vldrwq_gather_base_wb_z_s32,
vldrwq_gather_base_wb_z_u32, vstrdq_scatter_base_wb_p_s64, vstrdq_scatter_base_wb_p_u64,
vstrdq_scatter_base_wb_s64, vstrdq_scatter_base_wb_u64, vstrwq_scatter_base_wb_p_s32,
vstrwq_scatter_base_wb_p_f32, vstrwq_scatter_base_wb_p_u32, vstrwq_scatter_base_wb_s32,
vstrwq_scatter_base_wb_u32, vstrwq_scatter_base_wb_f32.

Please refer to M-profile Vector Extension (MVE) intrinsics [1]  for more details.
[1] https://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics

2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
            Andre Vieira  <andre.simoesdiasvieira@arm.com>
            Mihail Ionescu  <mihail.ionescu@arm.com>

	* config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
	qualifier.
	(LDRGBWBU_QUALIFIERS): Likewise.
	(LDRGBWBS_Z_QUALIFIERS): Likewise.
	(LDRGBWBU_Z_QUALIFIERS): Likewise.
	(STRSBWBS_QUALIFIERS): Likewise.
	(STRSBWBU_QUALIFIERS): Likewise.
	(STRSBWBS_P_QUALIFIERS): Likewise.
	(STRSBWBU_P_QUALIFIERS): Likewise.
	* config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
	(vldrdq_gather_base_wb_u64): Likewise.
	(vldrdq_gather_base_wb_z_s64): Likewise.
	(vldrdq_gather_base_wb_z_u64): Likewise.
	(vldrwq_gather_base_wb_f32): Likewise.
	(vldrwq_gather_base_wb_s32): Likewise.
	(vldrwq_gather_base_wb_u32): Likewise.
	(vldrwq_gather_base_wb_z_f32): Likewise.
	(vldrwq_gather_base_wb_z_s32): Likewise.
	(vldrwq_gather_base_wb_z_u32): Likewise.
	(vstrdq_scatter_base_wb_p_s64): Likewise.
	(vstrdq_scatter_base_wb_p_u64): Likewise.
	(vstrdq_scatter_base_wb_s64): Likewise.
	(vstrdq_scatter_base_wb_u64): Likewise.
	(vstrwq_scatter_base_wb_p_s32): Likewise.
	(vstrwq_scatter_base_wb_p_f32): Likewise.
	(vstrwq_scatter_base_wb_p_u32): Likewise.
	(vstrwq_scatter_base_wb_s32): Likewise.
	(vstrwq_scatter_base_wb_u32): Likewise.
	(vstrwq_scatter_base_wb_f32): Likewise.
	(__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
	(__arm_vldrdq_gather_base_wb_u64): Likewise.
	(__arm_vldrdq_gather_base_wb_z_s64): Likewise.
	(__arm_vldrdq_gather_base_wb_z_u64): Likewise.
	(__arm_vldrwq_gather_base_wb_s32): Likewise.
	(__arm_vldrwq_gather_base_wb_u32): Likewise.
	(__arm_vldrwq_gather_base_wb_z_s32): Likewise.
	(__arm_vldrwq_gather_base_wb_z_u32): Likewise.
	(__arm_vstrdq_scatter_base_wb_s64): Likewise.
	(__arm_vstrdq_scatter_base_wb_u64): Likewise.
	(__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
	(__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
	(__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
	(__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
	(__arm_vstrwq_scatter_base_wb_s32): Likewise.
	(__arm_vstrwq_scatter_base_wb_u32): Likewise.
	(__arm_vldrwq_gather_base_wb_f32): Likewise.
	(__arm_vldrwq_gather_base_wb_z_f32): Likewise.
	(__arm_vstrwq_scatter_base_wb_f32): Likewise.
	(__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
	(vstrwq_scatter_base_wb): Define polymorphic variant.
	(vstrwq_scatter_base_wb_p): Likewise.
	(vstrdq_scatter_base_wb_p): Likewise.
	(vstrdq_scatter_base_wb): Likewise.
	* config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
	qualifier.
	* config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
	pattern.
	(mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
	(mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
	(mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
	(mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
	(mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
	(mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
	(mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
	(mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
	(mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
	(mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
	(mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
	(mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
	(mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
	(mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
	(mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
	(mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
	(mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
	(mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
	(mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
	(mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
	(mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
	(mve_vldrwq_gather_base_wb_fv4sf): Likewise.
	(mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
	(mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
	(mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
	(mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
	(mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
	(mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
	(mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.

gcc/testsuite/ChangeLog:

2020-03-20  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
            Andre Vieira  <andre.simoesdiasvieira@arm.com>
            Mihail Ionescu  <mihail.ionescu@arm.com>

	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c: New test.
	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c: Likewise.
parent 92f80065
Showing with 551 additions and 0 deletions
gcc/ChangeLog
......@@ -2,6 +2,97 @@
Andre Vieira <andre.simoesdiasvieira@arm.com>
Mihail Ionescu <mihail.ionescu@arm.com>
* config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
qualifier.
(LDRGBWBU_QUALIFIERS): Likewise.
(LDRGBWBS_Z_QUALIFIERS): Likewise.
(LDRGBWBU_Z_QUALIFIERS): Likewise.
(STRSBWBS_QUALIFIERS): Likewise.
(STRSBWBU_QUALIFIERS): Likewise.
(STRSBWBS_P_QUALIFIERS): Likewise.
(STRSBWBU_P_QUALIFIERS): Likewise.
* config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
(vldrdq_gather_base_wb_u64): Likewise.
(vldrdq_gather_base_wb_z_s64): Likewise.
(vldrdq_gather_base_wb_z_u64): Likewise.
(vldrwq_gather_base_wb_f32): Likewise.
(vldrwq_gather_base_wb_s32): Likewise.
(vldrwq_gather_base_wb_u32): Likewise.
(vldrwq_gather_base_wb_z_f32): Likewise.
(vldrwq_gather_base_wb_z_s32): Likewise.
(vldrwq_gather_base_wb_z_u32): Likewise.
(vstrdq_scatter_base_wb_p_s64): Likewise.
(vstrdq_scatter_base_wb_p_u64): Likewise.
(vstrdq_scatter_base_wb_s64): Likewise.
(vstrdq_scatter_base_wb_u64): Likewise.
(vstrwq_scatter_base_wb_p_s32): Likewise.
(vstrwq_scatter_base_wb_p_f32): Likewise.
(vstrwq_scatter_base_wb_p_u32): Likewise.
(vstrwq_scatter_base_wb_s32): Likewise.
(vstrwq_scatter_base_wb_u32): Likewise.
(vstrwq_scatter_base_wb_f32): Likewise.
(__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
(__arm_vldrdq_gather_base_wb_u64): Likewise.
(__arm_vldrdq_gather_base_wb_z_s64): Likewise.
(__arm_vldrdq_gather_base_wb_z_u64): Likewise.
(__arm_vldrwq_gather_base_wb_s32): Likewise.
(__arm_vldrwq_gather_base_wb_u32): Likewise.
(__arm_vldrwq_gather_base_wb_z_s32): Likewise.
(__arm_vldrwq_gather_base_wb_z_u32): Likewise.
(__arm_vstrdq_scatter_base_wb_s64): Likewise.
(__arm_vstrdq_scatter_base_wb_u64): Likewise.
(__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
(__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
(__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
(__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
(__arm_vstrwq_scatter_base_wb_s32): Likewise.
(__arm_vstrwq_scatter_base_wb_u32): Likewise.
(__arm_vldrwq_gather_base_wb_f32): Likewise.
(__arm_vldrwq_gather_base_wb_z_f32): Likewise.
(__arm_vstrwq_scatter_base_wb_f32): Likewise.
(__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
(vstrwq_scatter_base_wb): Define polymorphic variant.
(vstrwq_scatter_base_wb_p): Likewise.
(vstrdq_scatter_base_wb_p): Likewise.
(vstrdq_scatter_base_wb): Likewise.
* config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
qualifier.
* config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
pattern.
(mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
(mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
(mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
(mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
(mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
(mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
(mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
(mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
(mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
(mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
(mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
(mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
(mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
(mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
(mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
(mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
(mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
(mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
(mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
(mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
(mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
(mve_vldrwq_gather_base_wb_fv4sf): Likewise.
(mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
(mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
(mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
(mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
(mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
(mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
(mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
Mihail Ionescu <mihail.ionescu@arm.com>
* config/arm/arm-builtins.c
(QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
builtin qualifier.
......
gcc/config/arm/arm-builtins.c
......@@ -718,6 +718,50 @@ arm_quinop_unone_unone_unone_unone_imm_unone_qualifiers[SIMD_MAX_BUILTIN_ARGS]
#define QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS \
(arm_quinop_unone_unone_unone_unone_imm_unone_qualifiers)
static enum arm_type_qualifiers
arm_ldrgbwbs_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_none, qualifier_unsigned, qualifier_immediate};
#define LDRGBWBS_QUALIFIERS (arm_ldrgbwbs_qualifiers)
static enum arm_type_qualifiers
arm_ldrgbwbu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_unsigned, qualifier_unsigned, qualifier_immediate};
#define LDRGBWBU_QUALIFIERS (arm_ldrgbwbu_qualifiers)
static enum arm_type_qualifiers
arm_ldrgbwbs_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_none, qualifier_unsigned, qualifier_immediate,
qualifier_unsigned};
#define LDRGBWBS_Z_QUALIFIERS (arm_ldrgbwbs_z_qualifiers)
static enum arm_type_qualifiers
arm_ldrgbwbu_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_unsigned, qualifier_unsigned, qualifier_immediate,
qualifier_unsigned};
#define LDRGBWBU_Z_QUALIFIERS (arm_ldrgbwbu_z_qualifiers)
static enum arm_type_qualifiers
arm_strsbwbs_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_void, qualifier_unsigned, qualifier_const, qualifier_none};
#define STRSBWBS_QUALIFIERS (arm_strsbwbs_qualifiers)
static enum arm_type_qualifiers
arm_strsbwbu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_void, qualifier_unsigned, qualifier_const, qualifier_unsigned};
#define STRSBWBU_QUALIFIERS (arm_strsbwbu_qualifiers)
static enum arm_type_qualifiers
arm_strsbwbs_p_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_void, qualifier_unsigned, qualifier_const,
qualifier_none, qualifier_unsigned};
#define STRSBWBS_P_QUALIFIERS (arm_strsbwbs_p_qualifiers)
static enum arm_type_qualifiers
arm_strsbwbu_p_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_void, qualifier_unsigned, qualifier_const,
qualifier_unsigned, qualifier_unsigned};
#define STRSBWBU_P_QUALIFIERS (arm_strsbwbu_p_qualifiers)
/* End of Qualifier for MVE builtins. */
/* void ([T element type] *, T, immediate). */
......
gcc/config/arm/arm_mve_builtins.def
......@@ -827,3 +827,33 @@ VAR3 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vddupq_m_n_u, v16qi, v8hi, v4si)
VAR3 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vidupq_m_n_u, v16qi, v8hi, v4si)
VAR3 (TERNOP_UNONE_UNONE_UNONE_IMM, vdwdupq_n_u, v16qi, v4si, v8hi)
VAR3 (TERNOP_UNONE_UNONE_UNONE_IMM, viwdupq_n_u, v16qi, v4si, v8hi)
VAR1 (STRSBWBU, vstrwq_scatter_base_wb_u, v4si)
VAR1 (STRSBWBU, vstrwq_scatter_base_wb_add_u, v4si)
VAR1 (STRSBWBU, vstrwq_scatter_base_wb_add_s, v4si)
VAR1 (STRSBWBU, vstrwq_scatter_base_wb_add_f, v4sf)
VAR1 (STRSBWBU, vstrdq_scatter_base_wb_u, v2di)
VAR1 (STRSBWBU, vstrdq_scatter_base_wb_add_u, v2di)
VAR1 (STRSBWBU, vstrdq_scatter_base_wb_add_s, v2di)
VAR1 (STRSBWBU_P, vstrwq_scatter_base_wb_p_u, v4si)
VAR1 (STRSBWBU_P, vstrwq_scatter_base_wb_p_add_u, v4si)
VAR1 (STRSBWBU_P, vstrwq_scatter_base_wb_p_add_s, v4si)
VAR1 (STRSBWBU_P, vstrwq_scatter_base_wb_p_add_f, v4sf)
VAR1 (STRSBWBU_P, vstrdq_scatter_base_wb_p_u, v2di)
VAR1 (STRSBWBU_P, vstrdq_scatter_base_wb_p_add_u, v2di)
VAR1 (STRSBWBU_P, vstrdq_scatter_base_wb_p_add_s, v2di)
VAR1 (STRSBWBS, vstrwq_scatter_base_wb_s, v4si)
VAR1 (STRSBWBS, vstrwq_scatter_base_wb_f, v4sf)
VAR1 (STRSBWBS, vstrdq_scatter_base_wb_s, v2di)
VAR1 (STRSBWBS_P, vstrwq_scatter_base_wb_p_s, v4si)
VAR1 (STRSBWBS_P, vstrwq_scatter_base_wb_p_f, v4sf)
VAR1 (STRSBWBS_P, vstrdq_scatter_base_wb_p_s, v2di)
VAR1 (LDRGBWBU_Z, vldrwq_gather_base_wb_z_u, v4si)
VAR1 (LDRGBWBU_Z, vldrdq_gather_base_wb_z_u, v2di)
VAR1 (LDRGBWBU, vldrwq_gather_base_wb_u, v4si)
VAR1 (LDRGBWBU, vldrdq_gather_base_wb_u, v2di)
VAR1 (LDRGBWBS_Z, vldrwq_gather_base_wb_z_s, v4si)
VAR1 (LDRGBWBS_Z, vldrwq_gather_base_wb_z_f, v4sf)
VAR1 (LDRGBWBS_Z, vldrdq_gather_base_wb_z_s, v2di)
VAR1 (LDRGBWBS, vldrwq_gather_base_wb_s, v4si)
VAR1 (LDRGBWBS, vldrwq_gather_base_wb_f, v4sf)
VAR1 (LDRGBWBS, vldrdq_gather_base_wb_s, v2di)
gcc/testsuite/ChangeLog
......@@ -2,6 +2,36 @@
Andre Vieira <andre.simoesdiasvieira@arm.com>
Mihail Ionescu <mihail.ionescu@arm.com>
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c: New test.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c: Likewise.
2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
Mihail Ionescu <mihail.ionescu@arm.com>
* gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: New test.
* gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c: Likewise.
......
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
int64x2_t
foo (uint64x2_t * addr)
{
return vldrdq_gather_base_wb_s64 (addr, 8);
}
/* { dg-final { scan-assembler "vldrd.64" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
uint64x2_t
foo (uint64x2_t * addr)
{
return vldrdq_gather_base_wb_u64 (addr, 8);
}
/* { dg-final { scan-assembler "vldrd.64" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
int64x2_t foo (uint64x2_t * addr, mve_pred16_t p)
{
return vldrdq_gather_base_wb_z_s64 (addr, 1016, p);
}
/* { dg-final { scan-assembler "vldrdt.u64" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
uint64x2_t foo (uint64x2_t * addr, mve_pred16_t p)
{
return vldrdq_gather_base_wb_z_u64 (addr, 8, p);
}
/* { dg-final { scan-assembler "vldrdt.u64" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
float32x4_t
foo (uint32x4_t * addr)
{
return vldrwq_gather_base_wb_f32 (addr, 8);
}
/* { dg-final { scan-assembler "vldrw.u32" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
int32x4_t
foo (uint32x4_t * addr)
{
return vldrwq_gather_base_wb_s32 (addr, 8);
}
/* { dg-final { scan-assembler "vldrw.u32" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
uint32x4_t
foo (uint32x4_t * addr)
{
return vldrwq_gather_base_wb_u32 (addr, 8);
}
/* { dg-final { scan-assembler "vldrw.u32" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
float32x4_t
foo (uint32x4_t * addr, mve_pred16_t p)
{
return vldrwq_gather_base_wb_z_f32 (addr, 8, p);
}
/* { dg-final { scan-assembler "vldrwt.u32" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
int32x4_t
foo (uint32x4_t * addr, mve_pred16_t p)
{
return vldrwq_gather_base_wb_z_s32 (addr, 8, p);
}
/* { dg-final { scan-assembler "vldrwt.u32" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
uint32x4_t
foo (uint32x4_t * addr, mve_pred16_t p)
{
return vldrwq_gather_base_wb_z_u32 (addr, 8, p);
}
/* { dg-final { scan-assembler "vldrwt.u32" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
void
foo (uint64x2_t * addr, const int offset, int64x2_t value, mve_pred16_t p)
{
vstrdq_scatter_base_wb_p_s64 (addr, 8, value, p);
}
/* { dg-final { scan-assembler "vstrdt.u64" } } */
void
foo1 (uint64x2_t * addr, const int offset, int64x2_t value, mve_pred16_t p)
{
vstrdq_scatter_base_wb_p (addr, 8, value, p);
}
/* { dg-final { scan-assembler "vstrdt.u64" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
void
foo (uint64x2_t * addr, const int offset, uint64x2_t value, mve_pred16_t p)
{
vstrdq_scatter_base_wb_p_u64 (addr, 8, value, p);
}
/* { dg-final { scan-assembler "vstrdt.u64" } } */
void
foo1 (uint64x2_t * addr, const int offset, uint64x2_t value, mve_pred16_t p)
{
vstrdq_scatter_base_wb_p (addr, 8, value, p);
}
/* { dg-final { scan-assembler "vstrdt.u64" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
void
foo (uint64x2_t * addr, const int offset, int64x2_t value)
{
vstrdq_scatter_base_wb_s64 (addr, 8, value);
}
/* { dg-final { scan-assembler "vstrd.u64" } } */
void
foo1 (uint64x2_t * addr, const int offset, int64x2_t value)
{
vstrdq_scatter_base_wb (addr, 8, value);
}
/* { dg-final { scan-assembler "vstrd.u64" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
void
foo (uint64x2_t * addr, const int offset, uint64x2_t value)
{
vstrdq_scatter_base_wb_u64 (addr, 8, value);
}
/* { dg-final { scan-assembler "vstrd.u64" } } */
void
foo1 (uint64x2_t * addr, const int offset, uint64x2_t value)
{
vstrdq_scatter_base_wb (addr, 8, value);
}
/* { dg-final { scan-assembler "vstrd.u64" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
void
foo (uint32x4_t * addr, const int offset, float32x4_t value)
{
vstrwq_scatter_base_wb_f32 (addr, 8, value);
}
/* { dg-final { scan-assembler "vstrw.u32" } } */
void
foo1 (uint32x4_t * addr, const int offset, float32x4_t value)
{
vstrwq_scatter_base_wb (addr, 8, value);
}
/* { dg-final { scan-assembler "vstrw.u32" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
void
foo (uint32x4_t * addr, const int offset, float32x4_t value, mve_pred16_t p)
{
vstrwq_scatter_base_wb_p_f32 (addr, 8, value, p);
}
/* { dg-final { scan-assembler "vstrwt.u32" } } */
void
foo1 (uint32x4_t * addr, const int offset, float32x4_t value, mve_pred16_t p)
{
vstrwq_scatter_base_wb_p (addr, 8, value, p);
}
/* { dg-final { scan-assembler "vstrwt.u32" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
void
foo (uint32x4_t * addr, const int offset, int32x4_t value, mve_pred16_t p)
{
vstrwq_scatter_base_wb_p_s32 (addr, 8, value, p);
}
/* { dg-final { scan-assembler "vstrwt.u32" } } */
void
foo1 (uint32x4_t * addr, const int offset, int32x4_t value, mve_pred16_t p)
{
vstrwq_scatter_base_wb_p (addr, 8, value, p);
}
/* { dg-final { scan-assembler "vstrwt.u32" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
void
foo (uint32x4_t * addr, const int offset, uint32x4_t value, mve_pred16_t p)
{
vstrwq_scatter_base_wb_p_u32 (addr, 8, value, p);
}
/* { dg-final { scan-assembler "vstrwt.u32" } } */
void
foo1 (uint32x4_t * addr, const int offset, uint32x4_t value, mve_pred16_t p)
{
vstrwq_scatter_base_wb_p (addr, 8, value, p);
}
/* { dg-final { scan-assembler "vstrwt.u32" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
void
foo (uint32x4_t * addr, const int offset, int32x4_t value)
{
vstrwq_scatter_base_wb_s32 (addr, 8, value);
}
/* { dg-final { scan-assembler "vstrw.u32" } } */
void
foo1 (uint32x4_t * addr, const int offset, int32x4_t value)
{
vstrwq_scatter_base_wb (addr, 8, value);
}
/* { dg-final { scan-assembler "vstrw.u32" } } */
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c 0 → 100644
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
#include "arm_mve.h"
void
foo (uint32x4_t * addr, uint32x4_t value)
{
vstrwq_scatter_base_wb_u32 (addr, 8, value);
}
/* { dg-final { scan-assembler "vstrw.u32" } } */
void
foo1 (uint32x4_t * addr, uint32x4_t value)
{
vstrwq_scatter_base_wb (addr, 8, value);
}
/* { dg-final { scan-assembler "vstrw.u32" } } */
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