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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
41d891aa
Commit
41d891aa
authored
May 08, 1997
by
Richard Earnshaw
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(CPP_SPEC): Delete.
(PROCESSOR_DEFAULT): Delete. (CPP_APCS_PC_DEFAULT_SPEC): Define. From-SVN: r14050
parent
32de079a
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gcc/config/arm/semi.h
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gcc/config/arm/semi.h
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41d891aa
/* Definitions of target machine for GNU compiler. ARM on semi-hosted platform
/* Definitions of target machine for GNU compiler. ARM on semi-hosted platform
Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc.
Copyright (C) 1994, 1995, 1996
, 1997
Free Software Foundation, Inc.
Contributed by Richard Earnshaw (richard.earnshaw@armltd.co.uk)
Contributed by Richard Earnshaw (richard.earnshaw@armltd.co.uk)
This file is part of GNU CC.
This file is part of GNU CC.
...
@@ -26,20 +26,6 @@ Boston, MA 02111-1307, USA. */
...
@@ -26,20 +26,6 @@ Boston, MA 02111-1307, USA. */
#define CPP_PREDEFINES \
#define CPP_PREDEFINES \
"-Darm -D__semi__ -Acpu(arm) -Amachine(arm)"
"-Darm -D__semi__ -Acpu(arm) -Amachine(arm)"
#define CPP_SPEC "%{m6:-D__arm6__} \
%{mcpu-*:-D__%*} \
%{mcpu=*:-D__%*} \
%{mapcs-32:-D__APCS_32__ -U__APCS_26__} \
%{mapcs-26:-D__APCS_26__ -U__APCS_32__} \
%{!mapcs-32: %{!mapcs-26:-D__APCS_32__}} \
%{msoft-float:-D__SOFTFP__} \
%{mhard-float:-U__SOFTFP__} \
%{!mhard-float: %{!msoft-float:-U__SOFTFP__}} \
%{mbig-endian:-D__ARMEB__ %{mwords-little-endian:-D__ARMWEL__}} \
%{mbe:-D__ARMEB__ %{mwords-little-endian:-D__ARMWEL__}} \
%{!mbe: %{!mbig-endian:-D__ARMEL__}} \
"
#define ASM_SPEC "%{mbig-endian:-EB}"
#define ASM_SPEC "%{mbig-endian:-EB}"
#define LINK_SPEC "%{mbig-endian:-EB} -X"
#define LINK_SPEC "%{mbig-endian:-EB} -X"
...
@@ -48,8 +34,7 @@ Boston, MA 02111-1307, USA. */
...
@@ -48,8 +34,7 @@ Boston, MA 02111-1307, USA. */
#define TARGET_DEFAULT ARM_FLAG_APCS_32
#define TARGET_DEFAULT ARM_FLAG_APCS_32
#ifndef PROCESSOR_DEFAULT
#define PROCESSOR_DEFAULT PROCESSOR_ARM6
#endif
#include "arm/aout.h"
#include "arm/aout.h"
#undef CPP_APCS_PC_DEFAULT_SPEC
#define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
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