neon.md (*neon_mov<mode>): Reject two non-register operands.

	* config/arm/neon.md (*neon_mov<mode>): Reject two non-register
	operands.
	(movti, mov<mode>): Call force_reg on one operand if required.
	* config/arm/vec-common.md (mov<mode>): Likewise.

From-SVN: r154093

gcc/ChangeLog

 2009-11-11  Daniel Jacobowitz  <dan@codesourcery.com>
 
+	* config/arm/neon.md (*neon_mov<mode>): Reject two non-register
+	operands.
+	(movti, mov<mode>): Call force_reg on one operand if required.
+	* config/arm/vec-common.md (mov<mode>): Likewise.
+
+2009-11-11  Daniel Jacobowitz  <dan@codesourcery.com>
+
 	* config/arm/arm.c (arm_override_options): Enable scheduling for
 	Thumb-2.
 

gcc/config/arm/neon.md

@@ -459,7 +459,9 @@
 	  "=w,Uv,w, w,  ?r,?w,?r,?r, ?Us")
 	(match_operand:VD 1 "general_operand"
 	  " w,w, Dn,Uvi, w, r, r, Usi,r"))]
-  "TARGET_NEON"
+  "TARGET_NEON
+   && (register_operand (operands[0], <MODE>mode)
+       || register_operand (operands[1], <MODE>mode))"
 {
   if (which_alternative == 2)
     {
@@ -506,7 +508,9 @@
   	  "=w,Un,w, w,  ?r,?w,?r,?r,  ?Us")
 	(match_operand:VQXMOV 1 "general_operand"
 	  " w,w, Dn,Uni, w, r, r, Usi, r"))]
-  "TARGET_NEON"
+  "TARGET_NEON
+   && (register_operand (operands[0], <MODE>mode)
+       || register_operand (operands[1], <MODE>mode))"
 {
   if (which_alternative == 2)
     {
@@ -549,6 +553,11 @@
 	(match_operand:TI 1 "general_operand" ""))]
   "TARGET_NEON"
 {
+  if (can_create_pseudo_p ())
+    {
+      if (GET_CODE (operands[0]) != REG)
+	operands[1] = force_reg (TImode, operands[1]);
+    }
 })
 
 (define_expand "mov<mode>"
@@ -556,12 +565,19 @@
 	(match_operand:VSTRUCT 1 "general_operand" ""))]
   "TARGET_NEON"
 {
+  if (can_create_pseudo_p ())
+    {
+      if (GET_CODE (operands[0]) != REG)
+	operands[1] = force_reg (<MODE>mode, operands[1]);
+    }
 })
 
 (define_insn "*neon_mov<mode>"
   [(set (match_operand:VSTRUCT 0 "nonimmediate_operand"	"=w,Ut,w")
 	(match_operand:VSTRUCT 1 "general_operand"	" w,w, Ut"))]
-  "TARGET_NEON"
+  "TARGET_NEON
+   && (register_operand (operands[0], <MODE>mode)
+       || register_operand (operands[1], <MODE>mode))"
 {
   switch (which_alternative)
     {

gcc/config/arm/vec-common.md

@@ -38,6 +38,11 @@
   "TARGET_NEON
    || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
 {
+  if (can_create_pseudo_p ())
+    {
+      if (GET_CODE (operands[0]) != REG)
+	operands[1] = force_reg (<MODE>mode, operands[1]);
+    }
 })
 
 ;; Vector arithmetic. Expanders are blank, then unnamed insns implement