Commit 4040b89a by Matthew Wahab Committed by Matthew Wahab

[PATCH 1/17][ARM] Add ARMv8.2-A command line option and profile.

2016-09-23  Matthew Wahab  <matthew.wahab@arm.com>

	* config/arm/arm-arches.def ("armv8.1-a"): Add FL_CRC32.
	("armv8.2-a"): New.
	("armv8.2-a+fp16"): New.
	* config/arm/arm-protos.h (FL2_ARCH8_2): New.
	(FL2_FP16INST): New.
	(FL2_FOR_ARCH8_2A): New.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm.c (arm_arch8_2): New.
	(arm_fp16_inst): New.
	(arm_option_override): Set arm_arch8_2 and arm_fp16_inst.  Check
	for incompatible fp16-format settings.
	* config/arm/arm.h (TARGET_VFP_FP16INST): New.
	(TARGET_NEON_FP16INST): New.
	(arm_arch8_2): Declare.
	(arm_fp16_inst): Declare.
	* config/arm/bpabi.h (BE8_LINK_SPEC): Add entries for
	march=armv8.2-a and march=armv8.2-a+fp16.
	* config/arm/t-aprofile (Arch Matches): Add entries for armv8.2-a
	and armv8.2-a+fp16.
	* doc/invoke.texi (ARM Options): Add "-march=armv8.1-a",
	"-march=armv8.2-a" and "-march=armv8.2-a+fp16".

From-SVN: r240398
parent 69ec2113
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-arches.def ("armv8.1-a"): Add FL_CRC32.
("armv8.2-a"): New.
("armv8.2-a+fp16"): New.
* config/arm/arm-protos.h (FL2_ARCH8_2): New.
(FL2_FP16INST): New.
(FL2_FOR_ARCH8_2A): New.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm.c (arm_arch8_2): New.
(arm_fp16_inst): New.
(arm_option_override): Set arm_arch8_2 and arm_fp16_inst. Check
for incompatible fp16-format settings.
* config/arm/arm.h (TARGET_VFP_FP16INST): New.
(TARGET_NEON_FP16INST): New.
(arm_arch8_2): Declare.
(arm_fp16_inst): Declare.
* config/arm/bpabi.h (BE8_LINK_SPEC): Add entries for
march=armv8.2-a and march=armv8.2-a+fp16.
* config/arm/t-aprofile (Arch Matches): Add entries for armv8.2-a
and armv8.2-a+fp16.
* doc/invoke.texi (ARM Options): Add "-march=armv8.1-a",
"-march=armv8.2-a" and "-march=armv8.2-a+fp16".
2016-09-23 Martin Liska <mliska@suse.cz>
* doc/extend.texi: Remove fused-madd from i386 target
......
......@@ -58,10 +58,17 @@ ARM_ARCH("armv7e-m", cortexm4, 7EM, ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_F
ARM_ARCH("armv8-a", cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_FOR_ARCH8A))
ARM_ARCH("armv8-a+crc",cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_CRC32 | FL_FOR_ARCH8A))
ARM_ARCH("armv8.1-a", cortexa53, 8A,
ARM_FSET_MAKE (FL_CO_PROC | FL_FOR_ARCH8A, FL2_FOR_ARCH8_1A))
ARM_FSET_MAKE (FL_CO_PROC | FL_CRC32 | FL_FOR_ARCH8A,
FL2_FOR_ARCH8_1A))
ARM_ARCH("armv8.1-a+crc",cortexa53, 8A,
ARM_FSET_MAKE (FL_CO_PROC | FL_CRC32 | FL_FOR_ARCH8A,
FL2_FOR_ARCH8_1A))
ARM_ARCH ("armv8.2-a", cortexa53, 8A,
ARM_FSET_MAKE (FL_CO_PROC | FL_CRC32 | FL_FOR_ARCH8A,
FL2_FOR_ARCH8_2A))
ARM_ARCH ("armv8.2-a+fp16", cortexa53, 8A,
ARM_FSET_MAKE (FL_CO_PROC | FL_CRC32 | FL_FOR_ARCH8A,
FL2_FOR_ARCH8_2A | FL2_FP16INST))
ARM_ARCH("armv8-m.base", cortexm0, 8M_BASE,
ARM_FSET_MAKE_CPU1 ( FL_FOR_ARCH8M_BASE))
ARM_ARCH("armv8-m.main", cortexm7, 8M_MAIN,
......@@ -70,4 +77,3 @@ ARM_ARCH("armv8-m.main+dsp", cortexm7, 8M_MAIN,
ARM_FSET_MAKE_CPU1(FL_CO_PROC | FL_ARCH7EM | FL_FOR_ARCH8M_MAIN))
ARM_ARCH("iwmmxt", iwmmxt, 5TE, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT))
ARM_ARCH("iwmmxt2", iwmmxt2, 5TE, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2))
......@@ -393,6 +393,9 @@ extern bool arm_is_constant_pool_ref (rtx);
#define FL_ARCH6KZ (1 << 31) /* ARMv6KZ architecture. */
#define FL2_ARCH8_1 (1 << 0) /* Architecture 8.1. */
#define FL2_ARCH8_2 (1 << 1) /* Architecture 8.2. */
#define FL2_FP16INST (1 << 2) /* FP16 Instructions for ARMv8.2 and
later. */
/* Flags that only effect tuning, not available instructions. */
#define FL_TUNE (FL_WBUF | FL_VFPV2 | FL_STRONG | FL_LDSCHED \
......@@ -424,6 +427,7 @@ extern bool arm_is_constant_pool_ref (rtx);
#define FL_FOR_ARCH7EM (FL_FOR_ARCH7M | FL_ARCH7EM)
#define FL_FOR_ARCH8A (FL_FOR_ARCH7VE | FL_ARCH8)
#define FL2_FOR_ARCH8_1A FL2_ARCH8_1
#define FL2_FOR_ARCH8_2A (FL2_FOR_ARCH8_1A | FL2_ARCH8_2)
#define FL_FOR_ARCH8M_BASE (FL_FOR_ARCH6M | FL_ARCH8 | FL_THUMB_DIV)
#define FL_FOR_ARCH8M_MAIN (FL_FOR_ARCH7M | FL_ARCH8)
......
......@@ -437,19 +437,25 @@ EnumValue
Enum(arm_arch) String(armv8.1-a+crc) Value(28)
EnumValue
Enum(arm_arch) String(armv8-m.base) Value(29)
Enum(arm_arch) String(armv8.2-a) Value(29)
EnumValue
Enum(arm_arch) String(armv8-m.main) Value(30)
Enum(arm_arch) String(armv8.2-a+fp16) Value(30)
EnumValue
Enum(arm_arch) String(armv8-m.main+dsp) Value(31)
Enum(arm_arch) String(armv8-m.base) Value(31)
EnumValue
Enum(arm_arch) String(iwmmxt) Value(32)
Enum(arm_arch) String(armv8-m.main) Value(32)
EnumValue
Enum(arm_arch) String(iwmmxt2) Value(33)
Enum(arm_arch) String(armv8-m.main+dsp) Value(33)
EnumValue
Enum(arm_arch) String(iwmmxt) Value(34)
EnumValue
Enum(arm_arch) String(iwmmxt2) Value(35)
Enum
Name(arm_fpu) Type(int)
......
......@@ -823,6 +823,13 @@ int arm_arch8 = 0;
/* Nonzero if this chip supports the ARMv8.1 extensions. */
int arm_arch8_1 = 0;
/* Nonzero if this chip supports the ARM Architecture 8.2 extensions. */
int arm_arch8_2 = 0;
/* Nonzero if this chip supports the FP16 instructions extension of ARM
Architecture 8.2. */
int arm_fp16_inst = 0;
/* Nonzero if this chip can benefit from load scheduling. */
int arm_ld_sched = 0;
......@@ -3232,6 +3239,7 @@ arm_option_override (void)
arm_arch7em = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH7EM);
arm_arch8 = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH8);
arm_arch8_1 = ARM_FSET_HAS_CPU2 (insn_flags, FL2_ARCH8_1);
arm_arch8_2 = ARM_FSET_HAS_CPU2 (insn_flags, FL2_ARCH8_2);
arm_arch_thumb1 = ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB);
arm_arch_thumb2 = ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB2);
arm_arch_xscale = ARM_FSET_HAS_CPU1 (insn_flags, FL_XSCALE);
......@@ -3248,6 +3256,13 @@ arm_option_override (void)
arm_tune_cortex_a9 = (arm_tune == cortexa9) != 0;
arm_arch_crc = ARM_FSET_HAS_CPU1 (insn_flags, FL_CRC32);
arm_m_profile_small_mul = ARM_FSET_HAS_CPU1 (insn_flags, FL_SMALLMUL);
arm_fp16_inst = ARM_FSET_HAS_CPU2 (insn_flags, FL2_FP16INST);
if (arm_fp16_inst)
{
if (arm_fp16_format == ARM_FP16_FORMAT_ALTERNATIVE)
error ("selected fp16 options are incompatible.");
arm_fp16_format = ARM_FP16_FORMAT_IEEE;
}
/* V5 code we generate is completely interworking capable, so we turn off
TARGET_INTERWORK here to avoid many tests later on. */
......
......@@ -217,6 +217,13 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
/* FPU supports ARMv8.1 Adv.SIMD extensions. */
#define TARGET_NEON_RDMA (TARGET_NEON && arm_arch8_1)
/* FPU supports the floating point FP16 instructions for ARMv8.2 and later. */
#define TARGET_VFP_FP16INST \
(TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 && arm_fp16_inst)
/* FPU supports the AdvSIMD FP16 instructions for ARMv8.2 and later. */
#define TARGET_NEON_FP16INST (TARGET_VFP_FP16INST && TARGET_NEON_RDMA)
/* Q-bit is present. */
#define TARGET_ARM_QBIT \
(TARGET_32BIT && arm_arch5e && (arm_arch_notm || arm_arch7))
......@@ -456,6 +463,13 @@ extern int arm_arch8;
/* Nonzero if this chip supports the ARM Architecture 8.1 extensions. */
extern int arm_arch8_1;
/* Nonzero if this chip supports the ARM Architecture 8.2 extensions. */
extern int arm_arch8_2;
/* Nonzero if this chip supports the FP16 instructions extension of ARM
Architecture 8.2. */
extern int arm_fp16_inst;
/* Nonzero if this chip can benefit from load scheduling. */
extern int arm_ld_sched;
......
......@@ -93,6 +93,8 @@
|march=armv8-a+crc \
|march=armv8.1-a \
|march=armv8.1-a+crc \
|march=armv8.2-a \
|march=armv8.2-a+fp16 \
|march=armv8-m.base \
|march=armv8-m.main \
|march=armv8-m.main+dsp \
......@@ -130,6 +132,8 @@
|march=armv8-a+crc \
|march=armv8.1-a \
|march=armv8.1-a+crc \
|march=armv8.2-a \
|march=armv8.2-a+fp16 \
|march=armv8-m.base \
|march=armv8-m.main \
|march=armv8-m.main+dsp \
......
......@@ -99,6 +99,8 @@ MULTILIB_MATCHES += march?armv8-a=mcpu?xgene1
MULTILIB_MATCHES += march?armv8-a=march?armv8-a+crc
MULTILIB_MATCHES += march?armv8-a=march?armv8.1-a
MULTILIB_MATCHES += march?armv8-a=march?armv8.1-a+crc
MULTILIB_MATCHES += march?armv8-a=march?armv8.2-a
MULTILIB_MATCHES += march?armv8-a=march?armv8.2-a+fp16
# FPU matches
MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3
......
......@@ -14503,6 +14503,19 @@ extensions.
@option{-march=armv8-a+crc} enables code generation for the ARMv8-A
architecture together with the optional CRC32 extensions.
@option{-march=armv8.1-a} enables compiler support for the ARMv8.1-A
architecture. This also enables the features provided by
@option{-march=armv8-a+crc}.
@option{-march=armv8.2-a} enables compiler support for the ARMv8.2-A
architecture. This also enables the features provided by
@option{-march=armv8.1-a}.
@option{-march=armv8.2-a+fp16} enables compiler support for the
ARMv8.2-A architecture with the optional FP16 instructions extension.
This also enables the features provided by @option{-march=armv8.1-a}
and implies @option{-mfp16-format=ieee}.
@option{-march=native} causes the compiler to auto-detect the architecture
of the build computer. At present, this feature is only supported on
GNU/Linux, and not all architectures are recognized. If the auto-detect
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment