mips.c (mips_emit_compare): Don't reverse UNGE and UNGT comparisons.

	* config/mips/mips.c (mips_emit_compare): Don't reverse UNGE and UNGT
	comparisons.
	* config/mips/mips.md (swapped_fcond): New code macro and attribute.
	(sgt_<mode>, sge_<mode>): Generalize to all members of swapped_fcond,
	including sunge_<mode> and sungt_<mode>.

From-SVN: r99380

gcc/ChangeLog

 2005-05-08  Richard Sandiford  <rsandifo@redhat.com>
 
+	* config/mips/mips.c (mips_emit_compare): Don't reverse UNGE and UNGT
+	comparisons.
+	* config/mips/mips.md (swapped_fcond): New code macro and attribute.
+	(sgt_<mode>, sge_<mode>): Generalize to all members of swapped_fcond,
+	including sunge_<mode> and sungt_<mode>.
+
+2005-05-08  Richard Sandiford  <rsandifo@redhat.com>
+
 	* integrate.h (get_hard_reg_initial_val): Change type of register
 	parameter from int to unsigned int.
 	(has_hard_reg_initial_val): Likewise.

gcc/config/mips/mips.c

@@ -2802,8 +2802,6 @@ mips_emit_compare (enum rtx_code *code, rtx *op0, rtx *op1, bool need_eq_ne_p)
       switch (*code)
 	{
 	case NE:
-	case UNGE:
-	case UNGT:
 	case LTGT:
 	case ORDERED:
 	  cmp_code = reverse_condition_maybe_unordered (*code);

gcc/config/mips/mips.md

@@ -413,6 +413,10 @@
 ;; generated from the same template.
 (define_code_macro fcond [unordered uneq unlt unle eq lt le])
 
+;; This code macro is used for comparisons that can be implemented
+;; by swapping the operands.
+(define_code_macro swapped_fcond [ge gt unge ungt])
+
 ;; <u> expands to an empty string when doing a signed operation and
 ;; "u" when doing an unsigned operation.
 (define_code_attr u [(sign_extend "") (zero_extend "u")])
@@ -438,6 +442,12 @@
 			 (eq "eq")
 			 (lt "lt")
 			 (le "le")])
+
+;; Similar, but for swapped conditions.
+(define_code_attr swapped_fcond [(ge "le")
+				 (gt "lt")
+				 (unge "ule")
+				 (ungt "ult")])
 
 ;; .........................
 ;;
@@ -4576,21 +4586,12 @@ beq\t%2,%.,1b\;\
   [(set_attr "type" "fcmp")
    (set_attr "mode" "FPSW")])
 
-(define_insn "sgt_<mode>"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-	(gt:CC (match_operand:SCALARF 1 "register_operand" "f")
-	       (match_operand:SCALARF 2 "register_operand" "f")))]
-  ""
-  "c.lt.<fmt>\t%Z0%2,%1"
-  [(set_attr "type" "fcmp")
-   (set_attr "mode" "FPSW")])
-
-(define_insn "sge_<mode>"
+(define_insn "s<code>_<mode>"
   [(set (match_operand:CC 0 "register_operand" "=z")
-	(ge:CC (match_operand:SCALARF 1 "register_operand" "f")
-	       (match_operand:SCALARF 2 "register_operand" "f")))]
+	(swapped_fcond:CC (match_operand:SCALARF 1 "register_operand" "f")
+		          (match_operand:SCALARF 2 "register_operand" "f")))]
   ""
-  "c.le.<fmt>\t%Z0%2,%1"
+  "c.<swapped_fcond>.<fmt>\t%Z0%2,%1"
   [(set_attr "type" "fcmp")
    (set_attr "mode" "FPSW")])
 

gcc/testsuite/ChangeLog

+2005-05-08  Richard Sandiford  <rsandifo@redhat.com>
+
+	* gcc.target/mips/fpcmp-[12].c: New tests.
+
 2005-05-06  Mark Mitchell  <mark@codesourcery.com>
 
 	* lib/target-supports-dg.exp (dg-require-fork): New function.

gcc/testsuite/gcc.target/mips/fpcmp-1.c

+/* We used to use c.lt.fmt instead of c.ule.fmt here.  */
+/* { dg-options "-mhard-float -O2" } */
+int f1 (float x, float y) { return __builtin_isless (x, y); }
+int f2 (double x, double y) { return __builtin_isless (x, y); }
+/* { dg-final { scan-assembler "c\\.ule\\.s" } } */
+/* { dg-final { scan-assembler "c\\.ule\\.d" } } */

gcc/testsuite/gcc.target/mips/fpcmp-2.c

+/* We used to use c.le.fmt instead of c.ult.fmt here.  */
+/* { dg-options "-mhard-float -O2" } */
+int f1 (float x, float y) { return __builtin_islessequal (x, y); }
+int f2 (double x, double y) { return __builtin_islessequal (x, y); }
+/* { dg-final { scan-assembler "c\\.ult\\.s" } } */
+/* { dg-final { scan-assembler "c\\.ult\\.d" } } */