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riscv-gcc-1
Commit 3ef50b62 by David Daney Committed by David Daney
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n32.S (ffi_closure_N32): Use 64-bit add instruction on pointer values. 

2007-12-06  David Daney  <ddaney@avtrex.com>

	* src/mips/n32.S (ffi_closure_N32): Use 64-bit add instruction on 
	pointer values.

From-SVN: r130655
parent dd748704
Showing with 8 additions and 3 deletions
libffi/ChangeLog
2007-12-06 David Daney <ddaney@avtrex.com>
* src/mips/n32.S (ffi_closure_N32): Use 64-bit add instruction on
pointer values.
2007-12-01 Andreas Tobler <a.tobler@schweiz.org>
PR libffi/31937
......
libffi/src/mips/n32.S
......@@ -417,9 +417,9 @@ ffi_closure_N32:
# Call ffi_closure_mips_inner_N32 to do the real work.
LA t9, ffi_closure_mips_inner_N32
move a0, $12 # Pointer to the ffi_closure
addu a1, $sp, V0_OFF2
addu a2, $sp, A0_OFF2
addu a3, $sp, F12_OFF2
ADDU a1, $sp, V0_OFF2
ADDU a2, $sp, A0_OFF2
ADDU a3, $sp, F12_OFF2
jalr t9
# Return flags are in v0
......
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