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Commit 3e0cef6d by Georg-Johann Lay Committed by Georg-Johann Lay
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re PR target/50358 (AVR: Implement [u]maddqihi4 [u]msubqihi4 patterns on the enhanced core) 

	
	PR target/50358
	* config/avr/predicates.md (const_1_to_6_operand): New predicate.
	* config/avr/avr.md: (extend_s): New code attribute.
	(mul_r_d): New code attribute.
	(*maddqihi4, *umaddqihi4): New insns.
	(*msubqihi4, *umsubqihi4): New insns.
	(*usmaddqihi4, *sumaddqihi4): New insns.
	(*usmsubqihi4, *susubdqihi4): New insns.
	(*umaddqihi4.uconst, *maddqihi4.sconst): New insn-and-splits.
	(*umsubqihi4.uconst, *msubqihi4.sconst): New insn-and-splits.
	(*umsubqihi4.uconst.ashift): New insn-and-split.
	(*msubqihi4.sconst.ashift): New insn-and-split.
	(*sumaddqihi4.uconst): New insn-and-split.
	(*sumsubqihi4.uconst): New insn-and-split.
	* config/avr/avr.c (avr_rtx_costs): Report costs of above in case
	PLUS:HI and MINUS:HI.

From-SVN: r178806
parent a9fb4f13
Showing with 45 additions and 0 deletions
gcc/ChangeLog
2011-09-13 Georg-Johann Lay <avr@gjlay.de>
PR target/50358
* config/avr/predicates.md (const_1_to_6_operand): New predicate.
* config/avr/avr.md: (extend_s): New code attribute.
(mul_r_d): New code attribute.
(*maddqihi4, *umaddqihi4): New insns.
(*msubqihi4, *umsubqihi4): New insns.
(*usmaddqihi4, *sumaddqihi4): New insns.
(*usmsubqihi4, *susubdqihi4): New insns.
(*umaddqihi4.uconst, *maddqihi4.sconst): New insn-and-splits.
(*umsubqihi4.uconst, *msubqihi4.sconst): New insn-and-splits.
(*umsubqihi4.uconst.ashift): New insn-and-split.
(*msubqihi4.sconst.ashift): New insn-and-split.
(*sumaddqihi4.uconst): New insn-and-split.
(*sumsubqihi4.uconst): New insn-and-split.
* config/avr/avr.c (avr_rtx_costs): Report costs of above in case
PLUS:HI and MINUS:HI.
2011-09-13 Revital Eres <revital.eres@linaro.org>
modulo-sched.c (remove_node_from_ps): Return void instead of bool.
gcc/config/avr/avr.c
......@@ -5576,6 +5576,16 @@ avr_rtx_costs (rtx x, int codearg, int outer_code ATTRIBUTE_UNUSED,
break;
case HImode:
if (AVR_HAVE_MUL
&& (MULT == GET_CODE (XEXP (x, 0))
|| ASHIFT == GET_CODE (XEXP (x, 0)))
&& register_operand (XEXP (x, 1), HImode)
&& (ZERO_EXTEND == GET_CODE (XEXP (XEXP (x, 0), 0))
|| SIGN_EXTEND == GET_CODE (XEXP (XEXP (x, 0), 0))))
{
*total = COSTS_N_INSNS (speed ? 5 : 4);
return true;
}
if (GET_CODE (XEXP (x, 1)) != CONST_INT)
{
*total = COSTS_N_INSNS (2);
......@@ -5608,6 +5618,17 @@ avr_rtx_costs (rtx x, int codearg, int outer_code ATTRIBUTE_UNUSED,
return true;
case MINUS:
if (AVR_HAVE_MUL
&& HImode == mode
&& register_operand (XEXP (x, 0), HImode)
&& (MULT == GET_CODE (XEXP (x, 1))
|| ASHIFT == GET_CODE (XEXP (x, 1)))
&& (ZERO_EXTEND == GET_CODE (XEXP (XEXP (x, 1), 0))
|| SIGN_EXTEND == GET_CODE (XEXP (XEXP (x, 1), 0))))
{
*total = COSTS_N_INSNS (speed ? 5 : 4);
return true;
}
case AND:
case IOR:
*total = COSTS_N_INSNS (GET_MODE_SIZE (mode));
......
gcc/config/avr/predicates.md
......@@ -78,6 +78,11 @@
(and (match_code "const_int")
(match_test "IN_RANGE (INTVAL (op), 2, 7)")))
;; Return 1 if OP is constant integer 1..6 for MODE.
(define_predicate "const_1_to_6_operand"
(and (match_code "const_int")
(match_test "IN_RANGE (INTVAL (op), 1, 6)")))
;; Return 1 if OP is constant integer 2..6 for MODE.
(define_predicate "const_2_to_6_operand"
(and (match_code "const_int")
......
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