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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
3d5570cb
Commit
3d5570cb
authored
Jun 14, 1994
by
Richard Kenner
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Fix whitespace in pattern.
From-SVN: r7456
parent
b57d3f55
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gcc/config/rs6000/rs6000.md
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gcc/config/rs6000/rs6000.md
View file @
3d5570cb
...
...
@@ -3939,13 +3939,13 @@
"TARGET_POWERPC64 && (register_operand (operands
[
0
]
, DFmode)
|| register_operand (operands
[
1
]
, DFmode))"
"@
mr %0,%1
ld%U1%X1 %0,%1
sd%U0%X0 %1,%0
#
fmr %0,%1
lfd %0,%1
stfd%U0%X0 %1,%0"
mr %0,%1
ld%U1%X1 %0,%1
sd%U0%X0 %1,%0
#
fmr %0,%1
lfd %0,%1
stfd%U0%X0 %1,%0"
[
(set_attr "type" "*,load,*,*,fp,fpload,*")
]
)
;; Next come the multi-word integer load and store and the load and store
...
...
@@ -4037,16 +4037,16 @@
"TARGET_POWERPC64 && (gpc_reg_operand (operands
[
0
]
, DImode)
|| gpc_reg_operand (operands
[
1
]
, DImode))"
"@
mr %0,%1
ld%U1%X1 %0,%1
sd%U0%X0 %1,%0
li %0,%1
lis %0,%u1
fmr %0,%1
lfd%U1%X1 %0,%1
stfd%U0%X0 %1,%0
mf%1 %0
mt%0 %1"
mr %0,%1
ld%U1%X1 %0,%1
sd%U0%X0 %1,%0
li %0,%1
lis %0,%u1
fmr %0,%1
lfd%U1%X1 %0,%1
stfd%U0%X0 %1,%0
mf%1 %0
mt%0 %1"
[
(set_attr "type" "*,load,*,*,*,fp,fpload,*,*,mtjmpr")
]
)
;; TImode is similar, except that we usually want to compute the address into
...
...
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