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riscv-gcc-1
Commit 3d2795a0 by Uros Bizjak Committed by Uros Bizjak
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i386.md (lea arith with mem operand + setcc peephole2): Set operator mode. 

	* config/i386/i386.md
	(lea arith with mem operand + setcc peephole2): Set operator mode.

From-SVN: r235519
parent 087146ca
Showing with 7 additions and 2 deletions
gcc/ChangeLog
2016-04-27 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md
(lea arith with mem operand + setcc peephole2): Set operator mode.
2016-04-27 H.J. Lu <hongjiu.lu@intel.com>
PR target/70155
......
gcc/config/i386/i386.md
......@@ -18023,8 +18023,8 @@
[(set (match_operand:SWI 0 "register_operand")
(match_operand:SWI 1 "memory_operand"))
(set (match_operand:SWI 3 "register_operand")
(plus (match_dup 0)
(match_operand:SWI 2 "<nonmemory_operand>")))
(plus:SWI (match_dup 0)
(match_operand:SWI 2 "<nonmemory_operand>")))
(set (match_dup 1) (match_dup 3))
(set (reg FLAGS_REG) (compare (match_dup 3) (const_int 0)))]
"(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
......
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