re PR target/62262 (aarch64 gcc generates invalid assembler)

	PR target/62262
	* config/aarch64/aarch64.md (*andim_ashift<mode>_bfiz): Check the shift
	amount before using it.

	* gcc.target/aarch64/pr62262.c: New test.

From-SVN: r214578

gcc/ChangeLog

+2014-08-27  Guozhi Wei  <carrot@google.com>
+
+	PR target/62262
+	* config/aarch64/aarch64.md (*andim_ashift<mode>_bfiz): Check the shift
+	amount before using it.
+
 2014-08-27  Richard Biener  <rguenther@suse.de>
 
 	* gimple-fold.c (get_maxval_strlen): Add overload wrapping

gcc/config/aarch64/aarch64.md

@@ -3431,7 +3431,8 @@
 	(and:GPI (ashift:GPI (match_operand:GPI 1 "register_operand" "r")
 			     (match_operand 2 "const_int_operand" "n"))
 		 (match_operand 3 "const_int_operand" "n")))]
-  "exact_log2 ((INTVAL (operands[3]) >> INTVAL (operands[2])) + 1) >= 0
+  "(INTVAL (operands[2]) < (<GPI:sizen>))
+   && exact_log2 ((INTVAL (operands[3]) >> INTVAL (operands[2])) + 1) >= 0
    && (INTVAL (operands[3]) & ((1 << INTVAL (operands[2])) - 1)) == 0"
   "ubfiz\\t%<w>0, %<w>1, %2, %P3"
   [(set_attr "type" "bfm")]

gcc/testsuite/ChangeLog

+2014-08-27  Guozhi Wei  <carrot@google.com>
+
+	PR target/62262
+	* gcc.target/aarch64/pr62262.c: New test.
+
 2014-08-26  Joseph Myers  <joseph@codesourcery.com>
 
 	PR target/60606

gcc/testsuite/gcc.target/aarch64/pr62262.c

+/* { dg-do compile } */
+/* { dg-options "-O2 -fprofile-use" } */
+
+static inline int CLZ(int mask) {
+   return mask ? __builtin_clz(mask) : 32;
+}
+
+int foo(int value)
+{
+    if (value == 0)
+        return 0;
+
+    int bias = CLZ(value);
+    value >>= bias;
+    int zeros = CLZ(value << 1);
+    value <<= zeros;
+
+    int packed = (unsigned)(value << 9) >> 9;
+    return packed;
+}