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riscv-gcc-1
Commit 3c8db3f2 by Richard Kenner
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(subdi3): Should not be commutative. 

(one_cmpldi2): Fixed typo with register operand.

From-SVN: r10255
parent a8d5e356
Showing with 2 additions and 2 deletions
gcc/config/m68k/m68k.md
...@@ -2636,7 +2636,7 @@ ...@@ -2636,7 +2636,7 @@
(define_insn "subdi3" (define_insn "subdi3"
[(set (match_operand:DI 0 "general_operand" "=d,<,d,o<>") [(set (match_operand:DI 0 "general_operand" "=d,<,d,o<>")
(minus:DI (match_operand:DI 1 "general_operand" "%0,0,0,0") (minus:DI (match_operand:DI 1 "general_operand" "0,0,0,0")
(match_operand:DI 2 "general_operand" "d,<,*ao>,d"))) (match_operand:DI 2 "general_operand" "d,<,*ao>,d")))
(clobber (match_scratch:SI 3 "=X,X,d,d"))] (clobber (match_scratch:SI 3 "=X,X,d,d"))]
"" ""
...@@ -4018,7 +4018,7 @@ ...@@ -4018,7 +4018,7 @@
{ {
CC_STATUS_INIT; CC_STATUS_INIT;
if (GET_CODE (operands[0]) == REG) if (GET_CODE (operands[0]) == REG)
operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
else if (GET_CODE (XEXP (operands[0], 0)) == POST_INC else if (GET_CODE (XEXP (operands[0], 0)) == POST_INC
|| GET_CODE (XEXP (operands[0], 0)) == PRE_DEC) || GET_CODE (XEXP (operands[0], 0)) == PRE_DEC)
operands[1] = operands[0]; operands[1] = operands[0];
......
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