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riscv-gcc-1
Commit 3b509e33 by Uros Bizjak
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* ChangeLog: Remove merge marker. 

From-SVN: r133077
parent 9886a872
Showing with 2 additions and 4 deletions
gcc/ChangeLog
...@@ -21,7 +21,7 @@ ...@@ -21,7 +21,7 @@
2008-03-09 Uros Bizjak <ubizjak@gmail.com> 2008-03-09 Uros Bizjak <ubizjak@gmail.com>
PR target/35496 PR target/35496
* config/i386/i386.c (ix86_constant_algnment): Compute alignment using * config/i386/i386.c (ix86_constant_alignment): Compute alignment using
ALIGN_MODE_128 for VECTOR_CST and INTEGER_CST in addition to REAL_CST. ALIGN_MODE_128 for VECTOR_CST and INTEGER_CST in addition to REAL_CST.
2008-03-09 Ira Rosen <irar@il.ibm.com> 2008-03-09 Ira Rosen <irar@il.ibm.com>
...@@ -416,7 +416,6 @@ ...@@ -416,7 +416,6 @@
transformations for modes that have signed zeros. transformations for modes that have signed zeros.
* ifcvt.c (noce_try_abs): Ditto. * ifcvt.c (noce_try_abs): Ditto.
>>>>>>> .r132956
2008-03-04 Joseph Myers <joseph@codesourcery.com> 2008-03-04 Joseph Myers <joseph@codesourcery.com>
* config/i386/i386.c (override_options): Force * config/i386/i386.c (override_options): Force
...@@ -1772,8 +1771,7 @@ ...@@ -1772,8 +1771,7 @@
(OPTION_MASK_ISA_SSE5_UNSET): Likewise. (OPTION_MASK_ISA_SSE5_UNSET): Likewise.
(OPTION_MASK_ISA_SSE4): Removed. (OPTION_MASK_ISA_SSE4): Removed.
(ix86_handle_option): Turn on bits in ix86_isa_flags and (ix86_handle_option): Turn on bits in ix86_isa_flags and
ix86_isa_flags_explicit with OPTION_MASK_ISA_XXX_SET for ix86_isa_flags_explicit with OPTION_MASK_ISA_XXX_SET for -mXXX.
-mXXX.
(override_options): Don't turn on implied SSE/MMX bits in (override_options): Don't turn on implied SSE/MMX bits in
ix86_isa_flags. ix86_isa_flags.
......
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