Commit 3af5dcdb by Richard Sandiford Committed by Richard Sandiford

re PR target/16144 (Bogus reference to __divdf3 when -O1)

	PR target/16144
	* config/mips/mips.md (divsf, divdf): Don't FAIL if the first operand
	is 1.0; force it into a register instead.

From-SVN: r83639
parent 838d4309
2004-06-25 Richard Sandiford <rsandifo@redhat.com>
PR target/16144
* config/mips/mips.md (divsf, divdf): Don't FAIL if the first operand
is 1.0; force it into a register instead.
2004-06-25 Bernardo Innocenti <bernie@develer.com> 2004-06-25 Bernardo Innocenti <bernie@develer.com>
* config/m68k/m68k.h: Restore valid comment removed by mistake with * config/m68k/m68k.h: Restore valid comment removed by mistake with
......
...@@ -2322,7 +2322,7 @@ ...@@ -2322,7 +2322,7 @@
{ {
if (const_float_1_operand (operands[1], DFmode)) if (const_float_1_operand (operands[1], DFmode))
if (!(ISA_HAS_FP4 && flag_unsafe_math_optimizations)) if (!(ISA_HAS_FP4 && flag_unsafe_math_optimizations))
FAIL; operands[1] = force_reg (DFmode, operands[1]);
}) })
;; This pattern works around the early SB-1 rev2 core "F1" erratum: ;; This pattern works around the early SB-1 rev2 core "F1" erratum:
...@@ -2372,7 +2372,7 @@ ...@@ -2372,7 +2372,7 @@
{ {
if (const_float_1_operand (operands[1], SFmode)) if (const_float_1_operand (operands[1], SFmode))
if (!(ISA_HAS_FP4 && flag_unsafe_math_optimizations)) if (!(ISA_HAS_FP4 && flag_unsafe_math_optimizations))
FAIL; operands[1] = force_reg (SFmode, operands[1]);
}) })
;; This pattern works around the early SB-1 rev2 core "F1" erratum (see ;; This pattern works around the early SB-1 rev2 core "F1" erratum (see
......
2004-06-25 Richard Sandiford <rsandifo@redhat.com>
* gcc.dg/torture/mips-div-1.c: New test.
2004-06-24 Jeff Law <law@redhat.com> 2004-06-24 Jeff Law <law@redhat.com>
* gcc.dg/tree-ssa/20040624-1.c: New test. * gcc.dg/tree-ssa/20040624-1.c: New test.
......
/* Check that hard-float MIPS code doesn't use library calls for 1.0/x. */
/* { dg-options "-fno-delayed-branch" } */
/* { dg-do compile { target mips*-*-* } } */
float f1 (float x) { return 1.0f / x; }
double f2 (double x) { return 1.0 / x; }
/* { dg-final { scan-assembler-not {lwc1.*__divsf3} } } */
/* { dg-final { scan-assembler-not {ldc1.*__divdf3} } } */
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