[ARC] Handle FPX NaN within optimized floating point library.

gcc/
2016-04-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gcc.target/arc/ieee_eq.c: New test.

libgcc/
2016-04-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/ieee-754/eqdf2.S: Handle FPX NaN.

From-SVN: r235633

gcc/ChangeLog

+2016-04-29  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gcc.target/arc/ieee_eq.c: New test.
+
 2016-04-29  Oleg Endo  <olegendo@gcc.gnu.org>
 
 	* common/config/sh/sh-common.c (sh_option_optimization_table): Remove

gcc/testsuite/gcc.target/arc/ieee_eq.c

+/* { dg-do run } */
+/* { dg-options "-O2" } */
+
+#include <stdio.h>
+#include <float.h>
+
+#define TEST_EQ(TYPE,X,Y,RES)				\
+  do {							\
+    volatile TYPE a, b;					\
+    a = (TYPE) X;					\
+    b = (TYPE) Y;					\
+    if ((a == b) != RES)				\
+      {							\
+	printf ("Runtime computation error @%d. %g "	\
+		"!= %g\n", __LINE__, a, b);		\
+	error = 1;					\
+      }							\
+  } while (0)
+
+#ifndef __HS__
+/* Special type of NaN found when using double FPX instructions.  */
+static const unsigned long long __nan = 0x7FF0000080000000ULL;
+# define W (*(double *) &__nan)
+#else
+# define W __builtin_nan ("")
+#endif
+
+#define Q __builtin_nan ("")
+#define H __builtin_inf ()
+
+int main (void)
+{
+  int error = 0;
+
+  TEST_EQ (double, 1, 1, 1);
+  TEST_EQ (double, 1, 2, 0);
+  TEST_EQ (double, W, W, 0);
+  TEST_EQ (double, Q, Q, 0);
+  TEST_EQ (double, __DBL_MAX__, __DBL_MAX__, 1);
+  TEST_EQ (double, __DBL_MIN__, __DBL_MIN__, 1);
+  TEST_EQ (double, H, H, 1);
+
+  if (error)
+    __builtin_abort ();
+
+  return 0;
+}

libgcc/ChangeLog

+2016-04-29  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/arc/ieee-754/eqdf2.S: Handle FPX NaN.
+
 2016-04-28  Claudiu Zissulescu  <claziss@synopsys.com>
 	    Joern Rennecke  <joern.rennecke@embecosm.com>
 

libgcc/config/arc/ieee-754/eqdf2.S

@@ -58,11 +58,16 @@ __eqdf2:
 	   well predictable (as seen from the branch predictor).  */
 __eqdf2:
 	brne.d DBL0H,DBL1H,.Lhighdiff
-	bmsk r12,DBL0H,20
-#ifdef DPFP_COMPAT
-	or.f 0,DBL0L,DBL1L
-	bset.ne r12,r12,21
-#endif /* DPFP_COMPAT */
+#ifndef __HS__
+	/* The next two instructions are required to recognize the FPX
+	NaN, which has a pattern like this: 0x7ff0_0000_8000_0000, as
+	oposite to 0x7ff8_0000_0000_0000.  */
+	or.f    0,DBL0L,DBL1L
+	mov_s	r12,0x00200000
+	bset.ne r12,r12,0
+#else
+	bmsk    r12,DBL0H,20
+#endif /* __HS__ */
 	add1.f	r12,r12,DBL0H /* set c iff NaN; also, clear z if NaN.  */
 	j_s.d	[blink]
 	cmp.cc	DBL0L,DBL1L