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Commit 39a10a29 by Geoff Keating Committed by Geoffrey Keating
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rs6000.c (validate_condition_mode): New function. 

* config/rs6000/rs6000.c (validate_condition_mode): New function.
(branch_comparison_operator): Call validate_condition_mode to
abort rather than returning 0.
(branch_positive_comparison_operator): New function.
(scc_comparison_operator): Call validate_condition_mode to abort
rather than returning 0.
(ccr_bit): Call validate_condition_mode.  Update for
new branch scheme.
(print_operand): Delete %C modifier.  Update %E case
to use EQ bit not SO bit.
(rs6000_reverse_condition): New function.
(rs6000_generate_compare): New function.
(rs6000_emit_sCOND): New function.
(rs6000_emit_cbranch): New function.
(output_cbranch): The length of a long branch insn is
now only 8 bytes.  Add validate_condition_mode.  Use
rs6000_reverse_condition.  Remove cror generation.
* config/rs6000/rs6000.h: Update comments.
(PREDICATE_CODES): Add new predicate.  Update codes used
by branch_comparison_operator and scc_comparison_operator.
* config/rs6000/rs6000-protos.h: Add prototypes for
new external functions.
* config/rs6000/rs6000.md: Add new scheduling parameters
for cr_logical instructions.  Change length of branch
instructions.
(bCOND patterns): Call rs6000_emit_cbranch.
(sCOND patterns): Call rs6000_emit_sCOND.
(branch patterns): Change lengths to 4.
(cr logical patterns): New.

From-SVN: r36191
parent 6e92b232
Showing with 95 additions and 53 deletions
gcc/ChangeLog
2000-09-06 Geoff Keating <geoffk@cygnus.com>
* config/rs6000/rs6000.c (validate_condition_mode): New function.
(branch_comparison_operator): Call validate_condition_mode to
abort rather than returning 0.
(branch_positive_comparison_operator): New function.
(scc_comparison_operator): Call validate_condition_mode to abort
rather than returning 0.
(ccr_bit): Call validate_condition_mode. Update for
new branch scheme.
(print_operand): Delete %C modifier. Update %E case
to use EQ bit not SO bit.
(rs6000_reverse_condition): New function.
(rs6000_generate_compare): New function.
(rs6000_emit_sCOND): New function.
(rs6000_emit_cbranch): New function.
(output_cbranch): The length of a long branch insn is
now only 8 bytes. Add validate_condition_mode. Use
rs6000_reverse_condition. Remove cror generation.
* config/rs6000/rs6000.h: Update comments.
(PREDICATE_CODES): Add new predicate. Update codes used
by branch_comparison_operator and scc_comparison_operator.
* config/rs6000/rs6000-protos.h: Add prototypes for
new external functions.
* config/rs6000/rs6000.md: Add new scheduling parameters
for cr_logical instructions. Change length of branch
instructions.
(bCOND patterns): Call rs6000_emit_cbranch.
(sCOND patterns): Call rs6000_emit_sCOND.
(branch patterns): Change lengths to 4.
(cr logical patterns): New.
2000-09-06 Richard Henderson <rth@cygnus.com> 2000-09-06 Richard Henderson <rth@cygnus.com>
* config/i386/i386.md (call_pop): Fix test for setting * config/i386/i386.md (call_pop): Fix test for setting
......
gcc/config/rs6000/rs6000-protos.h
...@@ -73,6 +73,8 @@ extern int expand_block_move PARAMS ((rtx[])); ...@@ -73,6 +73,8 @@ extern int expand_block_move PARAMS ((rtx[]));
extern int load_multiple_operation PARAMS ((rtx, enum machine_mode)); extern int load_multiple_operation PARAMS ((rtx, enum machine_mode));
extern int store_multiple_operation PARAMS ((rtx, enum machine_mode)); extern int store_multiple_operation PARAMS ((rtx, enum machine_mode));
extern int branch_comparison_operator PARAMS ((rtx, enum machine_mode)); extern int branch_comparison_operator PARAMS ((rtx, enum machine_mode));
extern int branch_positive_comparison_operator
PARAMS ((rtx, enum machine_mode));
extern int scc_comparison_operator PARAMS ((rtx, enum machine_mode)); extern int scc_comparison_operator PARAMS ((rtx, enum machine_mode));
extern int trap_comparison_operator PARAMS ((rtx, enum machine_mode)); extern int trap_comparison_operator PARAMS ((rtx, enum machine_mode));
extern int boolean_operator PARAMS ((rtx, enum machine_mode)); extern int boolean_operator PARAMS ((rtx, enum machine_mode));
...@@ -87,6 +89,10 @@ extern enum reg_class secondary_reload_class PARAMS ((enum reg_class, ...@@ -87,6 +89,10 @@ extern enum reg_class secondary_reload_class PARAMS ((enum reg_class,
extern int ccr_bit PARAMS ((rtx, int)); extern int ccr_bit PARAMS ((rtx, int));
extern void print_operand PARAMS ((FILE *, rtx, int)); extern void print_operand PARAMS ((FILE *, rtx, int));
extern void print_operand_address PARAMS ((FILE *, rtx)); extern void print_operand_address PARAMS ((FILE *, rtx));
extern enum rtx_code rs6000_reverse_condition PARAMS ((enum machine_mode,
enum rtx_code));
extern void rs6000_emit_sCOND PARAMS ((enum rtx_code, rtx));
extern void rs6000_emit_cbranch PARAMS ((enum rtx_code, rtx));
extern char * output_cbranch PARAMS ((rtx, const char *, int, rtx)); extern char * output_cbranch PARAMS ((rtx, const char *, int, rtx));
extern void output_toc PARAMS ((FILE *, rtx, int, enum machine_mode)); extern void output_toc PARAMS ((FILE *, rtx, int, enum machine_mode));
extern int rs6000_adjust_cost PARAMS ((rtx, rtx, rtx, int)); extern int rs6000_adjust_cost PARAMS ((rtx, rtx, rtx, int));
......
gcc/config/rs6000/rs6000.h
...@@ -2275,18 +2275,19 @@ do { \ ...@@ -2275,18 +2275,19 @@ do { \
For the RS/6000, we need separate modes when unsigned (logical) comparisons For the RS/6000, we need separate modes when unsigned (logical) comparisons
are being done and we need a separate mode for floating-point. We also are being done and we need a separate mode for floating-point. We also
use a mode for the case when we are comparing the results of two use a mode for the case when we are comparing the results of two
comparisons. */ comparisons, as then only the EQ bit is valid in the register. */
#define EXTRA_CC_MODES \ #define EXTRA_CC_MODES \
CC(CCUNSmode, "CCUNS") \ CC(CCUNSmode, "CCUNS") \
CC(CCFPmode, "CCFP") \ CC(CCFPmode, "CCFP") \
CC(CCEQmode, "CCEQ") CC(CCEQmode, "CCEQ")
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, /* Given a comparison code (EQ, NE, etc.) and the first operand of a
return the mode to be used for the comparison. For floating-point, CCFPmode COMPARE, return the mode to be used for the comparison. For
should be used. CCUNSmode should be used for unsigned comparisons. floating-point, CCFPmode should be used. CCUNSmode should be used
CCEQmode should be used when we are doing an inequality comparison on for unsigned comparisons. CCEQmode should be used when we are
the result of a comparison. CCmode should be used in all other cases. */ doing an inequality comparison on the result of a
comparison. CCmode should be used in all other cases. */
#define SELECT_CC_MODE(OP,X,Y) \ #define SELECT_CC_MODE(OP,X,Y) \
(GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \ (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \
...@@ -2720,54 +2721,57 @@ do { \ ...@@ -2720,54 +2721,57 @@ do { \
/* Define the codes that are matched by predicates in rs6000.c. */ /* Define the codes that are matched by predicates in rs6000.c. */
#define PREDICATE_CODES \ #define PREDICATE_CODES \
{"short_cint_operand", {CONST_INT}}, \ {"short_cint_operand", {CONST_INT}}, \
{"u_short_cint_operand", {CONST_INT}}, \ {"u_short_cint_operand", {CONST_INT}}, \
{"non_short_cint_operand", {CONST_INT}}, \ {"non_short_cint_operand", {CONST_INT}}, \
{"gpc_reg_operand", {SUBREG, REG}}, \ {"gpc_reg_operand", {SUBREG, REG}}, \
{"cc_reg_operand", {SUBREG, REG}}, \ {"cc_reg_operand", {SUBREG, REG}}, \
{"cc_reg_not_cr0_operand", {SUBREG, REG}}, \ {"cc_reg_not_cr0_operand", {SUBREG, REG}}, \
{"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \ {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \ {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \ {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_arith_cint_operand", {SUBREG, REG, CONST_INT}}, \ {"reg_or_arith_cint_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_logical_cint_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ {"reg_or_logical_cint_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \
{"got_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \ {"got_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
{"got_no_const_operand", {SYMBOL_REF, LABEL_REF}}, \ {"got_no_const_operand", {SYMBOL_REF, LABEL_REF}}, \
{"easy_fp_constant", {CONST_DOUBLE}}, \ {"easy_fp_constant", {CONST_DOUBLE}}, \
{"reg_or_mem_operand", {SUBREG, MEM, REG}}, \ {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \
{"lwa_operand", {SUBREG, MEM, REG}}, \ {"lwa_operand", {SUBREG, MEM, REG}}, \
{"volatile_mem_operand", {MEM}}, \ {"volatile_mem_operand", {MEM}}, \
{"offsettable_mem_operand", {MEM}}, \ {"offsettable_mem_operand", {MEM}}, \
{"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \ {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \
{"add_operand", {SUBREG, REG, CONST_INT}}, \ {"add_operand", {SUBREG, REG, CONST_INT}}, \
{"non_add_cint_operand", {CONST_INT}}, \ {"non_add_cint_operand", {CONST_INT}}, \
{"and_operand", {SUBREG, REG, CONST_INT}}, \ {"and_operand", {SUBREG, REG, CONST_INT}}, \
{"and64_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ {"and64_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \
{"logical_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ {"logical_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \
{"non_logical_cint_operand", {CONST_INT, CONST_DOUBLE}}, \ {"non_logical_cint_operand", {CONST_INT, CONST_DOUBLE}}, \
{"mask_operand", {CONST_INT}}, \ {"mask_operand", {CONST_INT}}, \
{"mask64_operand", {CONST_INT, CONST_DOUBLE}}, \ {"mask64_operand", {CONST_INT, CONST_DOUBLE}}, \
{"rldic_operand", {CONST_INT, CONST_DOUBLE}}, \ {"rldic_operand", {CONST_INT, CONST_DOUBLE}}, \
{"count_register_operand", {REG}}, \ {"count_register_operand", {REG}}, \
{"xer_operand", {REG}}, \ {"xer_operand", {REG}}, \
{"call_operand", {SYMBOL_REF, REG}}, \ {"call_operand", {SYMBOL_REF, REG}}, \
{"current_file_function_operand", {SYMBOL_REF}}, \ {"current_file_function_operand", {SYMBOL_REF}}, \
{"input_operand", {SUBREG, MEM, REG, CONST_INT, \ {"input_operand", {SUBREG, MEM, REG, CONST_INT, \
CONST_DOUBLE, SYMBOL_REF}}, \ CONST_DOUBLE, SYMBOL_REF}}, \
{"load_multiple_operation", {PARALLEL}}, \ {"load_multiple_operation", {PARALLEL}}, \
{"store_multiple_operation", {PARALLEL}}, \ {"store_multiple_operation", {PARALLEL}}, \
{"branch_comparison_operator", {EQ, NE, LE, LT, GE, \ {"branch_comparison_operator", {EQ, NE, LE, LT, GE, \
GT, LEU, LTU, GEU, GTU, \ GT, LEU, LTU, GEU, GTU, \
UNORDERED, ORDERED, \ UNORDERED, ORDERED, \
UNEQ, LTGT, \ UNGE, UNLE }}, \
UNGE, UNGT, UNLE, UNLT}}, \ {"branch_positive_comparison_operator", {EQ, LT, GT, LTU, GTU, \
{"scc_comparison_operator", {EQ, NE, LE, LT, GE, \ UNORDERED }}, \
GT, LEU, LTU, GEU, GTU}}, \ {"scc_comparison_operator", {EQ, NE, LE, LT, GE, \
{"trap_comparison_operator", {EQ, NE, LE, LT, GE, \ GT, LEU, LTU, GEU, GTU, \
GT, LEU, LTU, GEU, GTU}}, \ UNORDERED, ORDERED, \
{"boolean_operator", {AND, IOR, XOR}}, \ UNGE, UNLE }}, \
{"trap_comparison_operator", {EQ, NE, LE, LT, GE, \
GT, LEU, LTU, GEU, GTU}}, \
{"boolean_operator", {AND, IOR, XOR}}, \
{"boolean_or_operator", {IOR, XOR}}, {"boolean_or_operator", {IOR, XOR}},
/* uncomment for disabling the corresponding default options */ /* uncomment for disabling the corresponding default options */
......
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