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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
39950dff
Commit
39950dff
authored
Jul 26, 1996
by
Mike Stump
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install EH code
From-SVN: r12567
parent
ccbe9ffc
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gcc/config/arm/arm.h
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gcc/config/arm/arm.h
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39950dff
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@@ -1720,3 +1720,12 @@ do { \
arm_increase_location (4); \
ASM_OUTPUT_INT (FILE, XEXP (DECL_RTL (FUNCTION), 0)); \
} while (0)
/* Used to mask out junk bits from the return address, such as
processor state, interrupt status, condition codes and the like. */
#define MASK_RETURN_ADDR \
/* If we are generating code for an ARM2/ARM3 machine or for an ARM6 \
in 26 bit mode, the condition codes must be masked out of the \
return address. This does not apply to ARM6 and later processors \
when running in 32 bit mode. */
\
((!TARGET_6) ? (GEN_INT (0x03fffffc)) : (GEN_INT (0xffffffff)))
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