rs6000.c (rs6000_emit_move): Do not special-case HOST_BITS_PER_WIDE_INT != 32.

* config/rs6000/rs6000.c (rs6000_emit_move): Do not
special-case HOST_BITS_PER_WIDE_INT != 32.  Use same criteria
for generating CONST_INT and CONST_DOUBLE.


* config/rs6000/rs6000.c (logical_operand): CONST_INTs are
already sign-extended.
(rs6000_emit_prologue): Make register iterator signed.
(rs6000_emit_epilogue): Likewise.
* config/rs6000/rs6000.md (addsi3, adddi3): Sign-extend high
and low.
(movsf split, movdf split): Sign-extend CONST_INTs.
(movdi splits): Likewise.

From-SVN: r41282

gcc/ChangeLog

+2001-04-12  David Edelsohn  <dje@watson.ibm.com>
+
+	* config/rs6000/rs6000.c (rs6000_emit_move): Do not
+	special-case HOST_BITS_PER_WIDE_INT != 32.  Use same criteria
+	for generating CONST_INT and CONST_DOUBLE.
+
+2001-04-12  Alexandre Oliva  <aoliva@redhat.com>
+
+	* config/rs6000/rs6000.c (logical_operand): CONST_INTs are
+	already sign-extended.
+	(rs6000_emit_prologue): Make register iterator signed.
+	(rs6000_emit_epilogue): Likewise.
+	* config/rs6000/rs6000.md (addsi3, adddi3): Sign-extend high
+	and low.
+	(movsf split, movdf split): Sign-extend CONST_INTs.
+	(movdi splits): Likewise.
+
 2001-04-12  Kelley Cook <kelley.cook@home.com>
 
 	* config-lang.in (lang_dirs): Add in zlib.

gcc/config/rs6000/rs6000.c

@@ -965,7 +965,7 @@ add_operand (op, mode)
 {
   return (reg_or_short_operand (op, mode)
 	  || (GET_CODE (op) == CONST_INT
-	      && CONST_OK_FOR_LETTER_P (INTVAL(op), 'L')));
+	      && CONST_OK_FOR_LETTER_P (INTVAL (op), 'L')));
 }
 
 /* Return 1 if OP is a constant but not a valid add_operand.  */
@@ -977,7 +977,7 @@ non_add_cint_operand (op, mode)
 {
   return (GET_CODE (op) == CONST_INT
 	  && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000
-	  && ! CONST_OK_FOR_LETTER_P (INTVAL(op), 'L'));
+	  && ! CONST_OK_FOR_LETTER_P (INTVAL (op), 'L'));
 }
 
 /* Return 1 if the operand is a non-special register or a constant that
@@ -995,13 +995,7 @@ logical_operand (op, mode)
     return 1;
 
   if (GET_CODE (op) == CONST_INT)
-    {
-      opl = INTVAL (op) & GET_MODE_MASK (mode);
-      if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
-	oph = 0;
-      else
-	oph = INTVAL (op) >> (HOST_BITS_PER_WIDE_INT - 1);
-    }
+    opl = INTVAL (op);
   else if (GET_CODE (op) == CONST_DOUBLE)
     {
       if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
@@ -1009,13 +1003,21 @@ logical_operand (op, mode)
 
       opl = CONST_DOUBLE_LOW (op);
       oph = CONST_DOUBLE_HIGH (op);
+
+      if (oph != ((unsigned HOST_WIDE_INT)0
+		  - ((opl & ((unsigned HOST_WIDE_INT)1
+			     << (HOST_BITS_PER_WIDE_INT - 1))) != 0)))
+	return 0;
     }
   else
     return 0;
 
-  return (oph == 0
-	  && ((opl & ~ (unsigned HOST_WIDE_INT) 0xffff) == 0
-	      || (opl & ~ (unsigned HOST_WIDE_INT) 0xffff0000) == 0));
+  /* This must really be SImode, not MODE.  */
+  if (opl != trunc_int_for_mode (opl, SImode))
+    return 0;
+
+  return ((opl & 0xffff) == 0
+	  || (opl & ~ (unsigned HOST_WIDE_INT) 0xffff) == 0);
 }
 
 /* Return 1 if C is a constant that is not a logical operand (as
@@ -1709,11 +1711,12 @@ rs6000_emit_move (dest, source, mode)
 	}
       else if (mode == Pmode
 	       && CONSTANT_P (operands[1])
- 	       && (((HOST_BITS_PER_WIDE_INT != 32 
- 		     || GET_CODE (operands[1]) != CONST_INT)
- 		    && ! easy_fp_constant (operands[1], mode))
- 		   || (GET_CODE (operands[0]) == REG
- 		       && FP_REGNO_P (REGNO (operands[0]))))
+	       && ((GET_CODE (operands[1]) != CONST_INT
+		    && ! easy_fp_constant (operands[1], mode))
+		   || (GET_CODE (operands[1]) == CONST_INT
+		       && num_insns_constant (operands[1], mode) > 2)
+		   || (GET_CODE (operands[0]) == REG
+		       && FP_REGNO_P (REGNO (operands[0]))))
 	       && GET_CODE (operands[1]) != HIGH
 	       && ! LEGITIMATE_CONSTANT_POOL_ADDRESS_P (operands[1])
 	       && ! TOC_RELATIVE_EXPR_P (operands[1]))
@@ -5822,7 +5825,7 @@ rs6000_emit_prologue ()
      easiest way to get the frame unwind information emitted.  */
   if (current_function_calls_eh_return)
     {
-      unsigned int i, regno;
+      int i, regno;
       for (i = 0; ; ++i)
 	{
 	  rtx addr, reg, mem;
@@ -6078,7 +6081,7 @@ rs6000_emit_epilogue (sibcall)
   /* Load exception handler data registers, if needed.  */
   if (current_function_calls_eh_return)
     {
-      unsigned int i, regno;
+      int i, regno;
       for (i = 0; ; ++i)
 	{
 	  rtx addr, mem;

gcc/config/rs6000/rs6000.md

@@ -1426,7 +1426,10 @@
       HOST_WIDE_INT high = INTVAL (operands[2]) & (~ (HOST_WIDE_INT) 0xffff);
 
       if (low & 0x8000)
-        high += 0x10000, low |= ((HOST_WIDE_INT) -1) << 16;
+	{
+	  high = trunc_int_for_mode (high + 0x10000, SImode);
+	  low = trunc_int_for_mode (low, HImode);
+	}
 
       /* The ordering here is important for the prolog expander.
 	 When space is allocated from the stack, adding 'low' first may
@@ -1537,7 +1540,10 @@
   HOST_WIDE_INT high = INTVAL (operands[2]) & (~ (HOST_WIDE_INT) 0xffff);
 
   if (low & 0x8000)
-    high += 0x10000, low |= ((HOST_WIDE_INT) -1) << 16;
+    {
+      high = trunc_int_for_mode (high + 0x10000, SImode);
+      low = trunc_int_for_mode (low, HImode);
+    }
 
   operands[3] = GEN_INT (high);
   operands[4] = GEN_INT (low);
@@ -5767,7 +5773,10 @@
 	HOST_WIDE_INT high = INTVAL (operands[2]) & (~ (HOST_WIDE_INT) 0xffff);
 
 	if (low & 0x8000)
-	  high += 0x10000, low |= ((HOST_WIDE_INT) -1) << 16;
+	  {
+	    high = trunc_int_for_mode (high + 0x10000, SImode);
+	    low = trunc_int_for_mode (low, HImode);
+	  }
 
 	emit_insn (gen_adddi3 (tmp, operands[1], GEN_INT (high)));
 	emit_insn (gen_adddi3 (operands[0], tmp, GEN_INT (low)));
@@ -5866,7 +5875,10 @@
   HOST_WIDE_INT high = INTVAL (operands[2]) & (~ (HOST_WIDE_INT) 0xffff);
 
   if (low & 0x8000)
-    high+=0x10000, low |= ((HOST_WIDE_INT) -1) << 16;
+    {
+      high = trunc_int_for_mode (high + 0x10000, SImode);
+      low = trunc_int_for_mode (low, HImode);
+    }
 
   operands[3] = GEN_INT (high);
   operands[4] = GEN_INT (low);
@@ -7606,7 +7618,7 @@
   else
     operands[2] = gen_lowpart (SImode, operands[0]);
 
-  operands[3] = GEN_INT(l);
+  operands[3] = GEN_INT (trunc_int_for_mode (l, SImode));
 }")
 
 (define_insn "*movsf_hardfloat"
@@ -7696,8 +7708,8 @@
 
   operands[2] = operand_subword (operands[0], endian, 0, DFmode);
   operands[3] = operand_subword (operands[0], 1 - endian, 0, DFmode);
-  operands[4] = GEN_INT (l[endian]);
-  operands[5] = GEN_INT (l[1 - endian]);
+  operands[4] = GEN_INT (trunc_int_for_mode (l[endian], SImode));
+  operands[5] = GEN_INT (trunc_int_for_mode (l[1 - endian], SImode));
 }")
 
 (define_split
@@ -8042,7 +8054,7 @@
 		(match_dup 3)))]
   "
 {
-  operands[2] = GEN_INT (INTVAL (operands[1]) & 0xffff0000);
+  operands[2] = GEN_INT (INTVAL (operands[1]) & (~ (HOST_WIDE_INT) 0xffff));
   operands[3] = GEN_INT (INTVAL (operands[1]) & 0xffff);
 }")
 
@@ -8062,7 +8074,7 @@
 		(match_dup 3)))]
   "
 {
-  operands[2] = GEN_INT (CONST_DOUBLE_LOW (operands[1]) & 0xffff0000);
+  operands[2] = GEN_INT (CONST_DOUBLE_LOW (operands[1]) & (~ (HOST_WIDE_INT) 0xffff));
   operands[3] = GEN_INT (CONST_DOUBLE_LOW (operands[1]) & 0xffff);
 }")
 
@@ -8083,7 +8095,7 @@
 		(match_dup 3)))]
   "
 {
-  operands[2] = GEN_INT (INTVAL (operands[1]) & 0xffff0000);
+  operands[2] = GEN_INT (INTVAL (operands[1]) & (~ (HOST_WIDE_INT) 0xffff));
   operands[3] = GEN_INT (INTVAL (operands[1]) & 0xffff);
 }")