Commit 382e7faa by DJ Delorie Committed by DJ Delorie

re PR target/71338 ([RL78] mulu instruction not used on G10)

PR target/71338
* config/rl78/rl78-expand.c (umulqihi3): Enable for G10.
* config/rl78/rl78-virtual.c (umulhi3_shift_virt): Likewise.
(umulqihi3_virt): Likewise.
* config/rl78/rl78-real.c (umulhi3_shift_real): Likewise.
(umulqihi3_real): Likewise.

From-SVN: r237566
parent 8559b90f
2016-06-17 DJ Delorie <dj@redhat.com>
PR target/71338
* config/rl78/rl78-expand.c (umulqihi3): Enable for G10.
* config/rl78/rl78-virtual.c (umulhi3_shift_virt): Likewise.
(umulqihi3_virt): Likewise.
* config/rl78/rl78-real.c (umulhi3_shift_real): Likewise.
(umulqihi3_real): Likewise.
2016-06-17 Martin Liska <mliska@suse.cz>
* tree-ssa-reassoc.c (transform_add_to_multiply): Use auto_vec.
......
......@@ -159,7 +159,7 @@
[(set (match_operand:HI 0 "register_operand")
(mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand"))
(zero_extend:HI (match_operand:QI 2 "register_operand"))))]
"!TARGET_G10"
""
""
)
......
......@@ -179,7 +179,7 @@
[(set (match_operand:HI 0 "register_operand" "=A,A")
(mult:HI (match_operand:HI 1 "rl78_nonfar_operand" "0,0")
(match_operand:HI 2 "rl78_24_operand" "N,i")))]
"rl78_real_insns_ok () && !TARGET_G10"
"rl78_real_insns_ok ()"
"@
shlw\t%0, 1
shlw\t%0, 2"
......@@ -189,7 +189,7 @@
[(set (match_operand:HI 0 "nonimmediate_operand" "=A")
(mult:HI (zero_extend:HI (match_operand:QI 1 "general_operand" "%a"))
(zero_extend:HI (match_operand:QI 2 "general_operand" "x"))))]
"rl78_real_insns_ok () && !TARGET_G10"
"rl78_real_insns_ok ()"
"mulu\t%2"
)
......
......@@ -116,7 +116,7 @@
[(set (match_operand:HI 0 "register_operand" "=v")
(mult:HI (match_operand:HI 1 "rl78_nonfar_operand" "%vim")
(match_operand:HI 2 "rl78_24_operand" "Ni")))]
"rl78_virt_insns_ok () && !TARGET_G10"
"rl78_virt_insns_ok ()"
"v.mulu\t%0, %1, %2"
[(set_attr "valloc" "umul")]
)
......@@ -125,7 +125,7 @@
[(set (match_operand:HI 0 "register_operand" "=v")
(mult:HI (zero_extend:HI (match_operand:QI 1 "rl78_nonfar_operand" "%vim"))
(zero_extend:HI (match_operand:QI 2 "general_operand" "vim"))))]
"rl78_virt_insns_ok () && !TARGET_G10"
"rl78_virt_insns_ok ()"
"v.mulu\t%0, %2"
[(set_attr "valloc" "umul")]
)
......
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