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riscv-gcc-1
Commit 37875856 by H.J. Lu Committed by H.J. Lu
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Revert the last change on cant_combine_insn_p. 

2011-03-17  H.J. Lu  <hongjiu.lu@intel.com>

	PR middle-end/47725
	* combine.c (cant_combine_insn_p): Don't check zero/sign
	extended hard registers.

From-SVN: r171125
parent 76069764
Showing with 6 additions and 6 deletions
gcc/ChangeLog
2011-03-17 H.J. Lu <hongjiu.lu@intel.com>
PR middle-end/47725
* combine.c (cant_combine_insn_p): Don't check zero/sign
extended hard registers.
2011-03-17 H.J. Lu <hongjiu.lu@intel.com>
PR middle-end/47725
* combine.c (cant_combine_insn_p): Check zero/sign extended
hard registers.
......
gcc/combine.c
......@@ -2137,12 +2137,6 @@ cant_combine_insn_p (rtx insn)
return 0;
src = SET_SRC (set);
dest = SET_DEST (set);
if (GET_CODE (src) == ZERO_EXTEND
|| GET_CODE (src) == SIGN_EXTEND)
src = XEXP (src, 0);
if (GET_CODE (dest) == ZERO_EXTEND
|| GET_CODE (dest) == SIGN_EXTEND)
dest = XEXP (dest, 0);
if (GET_CODE (src) == SUBREG)
src = SUBREG_REG (src);
if (GET_CODE (dest) == SUBREG)
......
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