Commit 3751345d by Richard Earnshaw Committed by Richard Earnshaw

AArch64 - new pass to add conditional-branch speculation tracking

This patch is the main part of the speculation tracking code.  It adds
a new target-specific pass that is run just before the final branch
reorg pass (so that it can clean up any new edge insertions we make).
The pass is only run with -mtrack-speculation is passed on the command
line.

One thing that did come to light as part of this was that the stack pointer
register was not being permitted in comparision instructions.  We rely on
that for moving the tracking state between SP and the scratch register at
function call boundaries.

	* config/aarch64/aarch64-speculation.cc: New file.
	* config/aarch64/aarch64-passes.def (pass_track_speculation): Add before
	pass_reorder_blocks.
	* config/aarch64/aarch64-protos.h (make_pass_track_speculation): Add
	prototype.
	* config/aarch64/aarch64.c (aarch64_conditional_register_usage): Fix
	X14 and X15 when tracking speculation.
	* config/aarch64/aarch64.md (register name constants): Add
	SPECULATION_TRACKER_REGNUM and SPECULATION_SCRATCH_REGNUM.
	(unspec): Add UNSPEC_SPECULATION_TRACKER.
	(speculation_barrier): New insn attribute.
	(cmp<mode>): Allow SP in comparisons.
	(speculation_tracker): New insn.
	(speculation_barrier): Add speculation_barrier attribute.
	* config/aarch64/t-aarch64: Add make rule for aarch64-speculation.o.
	* config.gcc (aarch64*-*-*): Add aarch64-speculation.o to extra_objs.
	* doc/invoke.texi (AArch64 Options): Document -mtrack-speculation.

From-SVN: r263173
parent 6e1eaca9
2018-07-31 Richard Earnshaw <rearnsha@arm.com>
* config/aarch64/aarch64-speculation.cc: New file.
* config/aarch64/aarch64-passes.def (pass_track_speculation): Add
before pass_reorder_blocks.
* config/aarch64/aarch64-protos.h (make_pass_track_speculation): Add
prototype.
* config/aarch64/aarch64.c (aarch64_conditional_register_usage): Fix
X14 and X15 when tracking speculation.
* config/aarch64/aarch64.md (register name constants): Add
SPECULATION_TRACKER_REGNUM and SPECULATION_SCRATCH_REGNUM.
(unspec): Add UNSPEC_SPECULATION_TRACKER.
(speculation_barrier): New insn attribute.
(cmp<mode>): Allow SP in comparisons.
(speculation_tracker): New insn.
(speculation_barrier): Add speculation_barrier attribute.
* config/aarch64/t-aarch64: Add make rule for aarch64-speculation.o.
* config.gcc (aarch64*-*-*): Add aarch64-speculation.o to extra_objs.
* doc/invoke.texi (AArch64 Options): Document -mtrack-speculation.
2018-07-31 Richard Earnshaw <rearnsha@arm.com>
* config/aarch64/aarch64.md (cb<optab><mode>1): Disable when
aarch64_track_speculation is true.
(tb<optab><mode>1): Likewise.
......
......@@ -304,7 +304,7 @@ aarch64*-*-*)
extra_headers="arm_fp16.h arm_neon.h arm_acle.h"
c_target_objs="aarch64-c.o"
cxx_target_objs="aarch64-c.o"
extra_objs="aarch64-builtins.o aarch-common.o cortex-a57-fma-steering.o"
extra_objs="aarch64-builtins.o aarch-common.o cortex-a57-fma-steering.o aarch64-speculation.o"
target_gtfiles="\$(srcdir)/config/aarch64/aarch64-builtins.c"
target_has_targetm_common=yes
;;
......
......@@ -19,3 +19,4 @@
<http://www.gnu.org/licenses/>. */
INSERT_PASS_AFTER (pass_regrename, 1, pass_fma_steering);
INSERT_PASS_BEFORE (pass_reorder_blocks, 1, pass_track_speculation);
......@@ -570,7 +570,8 @@ enum aarch64_parse_opt_result aarch64_parse_extension (const char *,
std::string aarch64_get_extension_string_for_isa_flags (unsigned long,
unsigned long);
rtl_opt_pass *make_pass_fma_steering (gcc::context *ctxt);
rtl_opt_pass *make_pass_fma_steering (gcc::context *);
rtl_opt_pass *make_pass_track_speculation (gcc::context *);
poly_uint64 aarch64_regmode_natural_size (machine_mode);
......
......@@ -12602,6 +12602,19 @@ aarch64_conditional_register_usage (void)
fixed_regs[i] = 1;
call_used_regs[i] = 1;
}
/* When tracking speculation, we need a couple of call-clobbered registers
to track the speculation state. It would be nice to just use
IP0 and IP1, but currently there are numerous places that just
assume these registers are free for other uses (eg pointer
authentication). */
if (aarch64_track_speculation)
{
fixed_regs[SPECULATION_TRACKER_REGNUM] = 1;
call_used_regs[SPECULATION_TRACKER_REGNUM] = 1;
fixed_regs[SPECULATION_SCRATCH_REGNUM] = 1;
call_used_regs[SPECULATION_SCRATCH_REGNUM] = 1;
}
}
/* Walk down the type tree of TYPE counting consecutive base elements.
......
......@@ -88,6 +88,10 @@
(P13_REGNUM 81)
(P14_REGNUM 82)
(P15_REGNUM 83)
;; A couple of call-clobbered registers that we need to reserve when
;; tracking speculation this is not ABI, so is subject to change.
(SPECULATION_TRACKER_REGNUM 15)
(SPECULATION_SCRATCH_REGNUM 14)
]
)
......@@ -195,6 +199,7 @@
UNSPEC_CLASTB
UNSPEC_FADDA
UNSPEC_REV_SUBREG
UNSPEC_SPECULATION_TRACKER
])
(define_c_enum "unspecv" [
......@@ -287,6 +292,11 @@
;; no predicated insns.
(define_attr "predicated" "yes,no" (const_string "no"))
;; Set to true on an insn that requires the speculation tracking state to be
;; in the tracking register before the insn issues. Otherwise the compiler
;; may chose to hold the tracking state encoded in SP.
(define_attr "speculation_barrier" "true,false" (const_string "false"))
;; -------------------------------------------------------------------
;; Pipeline descriptions and scheduling
;; -------------------------------------------------------------------
......@@ -3540,7 +3550,7 @@
(define_insn "cmp<mode>"
[(set (reg:CC CC_REGNUM)
(compare:CC (match_operand:GPI 0 "register_operand" "r,r,r")
(compare:CC (match_operand:GPI 0 "register_operand" "rk,rk,rk")
(match_operand:GPI 1 "aarch64_plus_operand" "r,I,J")))]
""
"@
......@@ -6549,6 +6559,21 @@
DONE;
})
;; Track speculation through conditional branches. We assume that
;; SPECULATION_TRACKER_REGNUM is reserved for this purpose when necessary.
(define_insn "speculation_tracker"
[(set (reg:DI SPECULATION_TRACKER_REGNUM)
(unspec [(reg:DI SPECULATION_TRACKER_REGNUM) (match_operand 0)]
UNSPEC_SPECULATION_TRACKER))]
""
{
operands[1] = gen_rtx_REG (DImode, SPECULATION_TRACKER_REGNUM);
output_asm_insn ("csel\\t%1, %1, xzr, %m0", operands);
return "";
}
[(set_attr "type" "csel")]
)
;; Helper for aarch64.c code.
(define_expand "set_clobber_cc"
[(parallel [(set (match_operand 0)
......@@ -6561,7 +6586,8 @@
""
"isb\;dsb\\tsy"
[(set_attr "length" "8")
(set_attr "type" "block")]
(set_attr "type" "block")
(set_attr "speculation_barrier" "true")]
)
;; AdvSIMD Stuff
......
......@@ -67,6 +67,16 @@ cortex-a57-fma-steering.o: $(srcdir)/config/aarch64/cortex-a57-fma-steering.c \
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
$(srcdir)/config/aarch64/cortex-a57-fma-steering.c
aarch64-speculation.o: $(srcdir)/config/aarch64/aarch64-speculation.cc \
$(CONFIG_H) \
$(SYSTEM_H) \
$(TM_H) \
$(TARGET_H) \
$(RTL_BASE_H) \
$(TREE_PASS_H)
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_SPPFLAGS) $(INCLUDES) \
$(srcdir)/config/aarch64/aarch64-speculation.cc
comma=,
MULTILIB_OPTIONS = $(subst $(comma),/, $(patsubst %, mabi=%, $(subst $(comma),$(comma)mabi=,$(TM_MULTILIB_CONFIG))))
MULTILIB_DIRNAMES = $(subst $(comma), ,$(TM_MULTILIB_CONFIG))
......@@ -617,7 +617,7 @@ Objective-C and Objective-C++ Dialects}.
-mpc-relative-literal-loads @gol
-msign-return-address=@var{scope} @gol
-march=@var{name} -mcpu=@var{name} -mtune=@var{name} @gol
-moverride=@var{string} -mverbose-cost-dump}
-moverride=@var{string} -mverbose-cost-dump -mtrack-speculation}
@emph{Adapteva Epiphany Options}
@gccoptlist{-mhalf-reg-file -mprefer-short-insn-regs @gol
......@@ -14786,6 +14786,14 @@ This option only has an effect if @option{-ffast-math} or
precision of division results to about 16 bits for
single precision and to 32 bits for double precision.
@item -mtrack-speculation
@itemx -mno-track-speculation
Enable or disable generation of additional code to track speculative
execution through conditional branches. The tracking state can then
be used by the compiler when expanding calls to
@code{__builtin_speculation_safe_copy} to permit a more efficient code
sequence to be generated.
@item -march=@var{name}
@opindex march
Specify the name of the target architecture and, optionally, one or
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