Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
R
riscv-gcc-1
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
riscv-gcc-1
Commits
373a04f1
Commit
373a04f1
authored
Dec 18, 2003
by
Jason Merrill
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
note that in-out operands should only be used with register constraints
From-SVN: r74802
parent
f37d2ca6
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
13 additions
and
12 deletions
+13
-12
gcc/doc/extend.texi
+13
-12
No files found.
gcc/doc/extend.texi
View file @
373a04f1
...
@@ -3913,18 +3913,19 @@ The ordinary output operands must be write-only; GCC will assume that
...
@@ -3913,18 +3913,19 @@ The ordinary output operands must be write-only; GCC will assume that
the
values
in
these
operands
before
the
instruction
are
dead
and
need
the
values
in
these
operands
before
the
instruction
are
dead
and
need
not
be
generated
.
Extended
asm
supports
input
-
output
or
read
-
write
not
be
generated
.
Extended
asm
supports
input
-
output
or
read
-
write
operands
.
Use
the
constraint
character
@
samp
{+}
to
indicate
such
an
operands
.
Use
the
constraint
character
@
samp
{+}
to
indicate
such
an
operand
and
list
it
with
the
output
operands
.
operand
and
list
it
with
the
output
operands
.
You
should
only
use
read
-
write
operands
when
the
constraints
for
the
operand
(
or
the
When
the
constraints
for
the
read
-
write
operand
(
or
the
operand
in
which
operand
in
which
only
some
of
the
bits
are
to
be
changed
)
allow
a
only
some
of
the
bits
are
to
be
changed
)
allows
a
register
,
you
may
,
as
register
.
an
alternative
,
logically
split
its
function
into
two
separate
operands
,
one
input
operand
and
one
write
-
only
output
operand
.
The
connection
You
may
,
as
an
alternative
,
logically
split
its
function
into
two
between
them
is
expressed
by
constraints
which
say
they
need
to
be
in
separate
operands
,
one
input
operand
and
one
write
-
only
output
the
same
location
when
the
instruction
executes
.
You
can
use
the
same
C
operand
.
The
connection
between
them
is
expressed
by
constraints
expression
for
both
operands
,
or
different
expressions
.
For
example
,
which
say
they
need
to
be
in
the
same
location
when
the
instruction
here
we
write
the
(
fictitious
)
@
samp
{
combine
}
instruction
with
executes
.
You
can
use
the
same
C
expression
for
both
operands
,
or
@
code
{
bar
}
as
its
read
-
only
source
operand
and
@
code
{
foo
}
as
its
different
expressions
.
For
example
,
here
we
write
the
(
fictitious
)
read
-
write
destination
:
@
samp
{
combine
}
instruction
with
@
code
{
bar
}
as
its
read
-
only
source
operand
and
@
code
{
foo
}
as
its
read
-
write
destination
:
@
example
@
example
asm
(
"combine %2,%0"
:
"=r"
(
foo
)
:
"0"
(
foo
),
"g"
(
bar
));
asm
(
"combine %2,%0"
:
"=r"
(
foo
)
:
"0"
(
foo
),
"g"
(
bar
));
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment