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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
36fa5a76
Commit
36fa5a76
authored
Jul 10, 2001
by
Richard Kenner
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Fix typo in last change
From-SVN: r43919
parent
0407c02b
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gcc/config/mips/mips.c
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gcc/config/mips/mips.c
View file @
36fa5a76
...
@@ -942,7 +942,7 @@ double_memory_operand (op, mode)
...
@@ -942,7 +942,7 @@ double_memory_operand (op, mode)
op
=
adjust_address_nv
(
op
,
GET_MODE_CLASS
(
mode
)
==
MODE_INT
op
=
adjust_address_nv
(
op
,
GET_MODE_CLASS
(
mode
)
==
MODE_INT
?
SImode
:
SFmode
,
4
);
?
SImode
:
SFmode
,
4
);
return
memory_address_p
(
XEXP
(
op
,
0
));
return
memory_address_p
(
GET_MODE
(
op
),
XEXP
(
op
,
0
));
}
}
/* Return nonzero if the code of this rtx pattern is EQ or NE. */
/* Return nonzero if the code of this rtx pattern is EQ or NE. */
...
...
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