re PR target/47553 (ARM neon vld1q_lane_u8 & co. don't accept lanes >= 8)

gcc/
	PR target/47553
	* config/arm/predicates.md (neon_lane_number): Accept 0..15.

gcc/testsuite/
	PR target/47553
	* gcc.target/arm/neon-vld-1.c: New test.

From-SVN: r171344

gcc/ChangeLog

 2011-03-23  Richard Sandiford  <richard.sandiford@linaro.org>
 
+	PR target/47553
+	* config/arm/predicates.md (neon_lane_number): Accept 0..15.
+
+2011-03-23  Richard Sandiford  <richard.sandiford@linaro.org>
+
 	* optabs.h (emit_unop_insn, maybe_emit_unop_insn): Change insn code
 	parameter from "int" to "enum insn_code".
 	(expand_operand_type): New enum.

gcc/config/arm/predicates.md

@@ -610,7 +610,7 @@
 ;; TODO: We could check lane numbers more precisely based on the mode.
 (define_predicate "neon_lane_number"
   (and (match_code "const_int")
-       (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 7")))
+       (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 15")))
 ;; Predicates for named expanders that overlap multiple ISAs.
 
 (define_predicate "cmpdi_operand"

gcc/testsuite/ChangeLog

+2011-03-23  Richard Sandiford  <richard.sandiford@linaro.org>
+
+	PR target/47553
+	* gcc.target/arm/neon-vld-1.c: New test.
+
 2011-03-23  Eric Botcazou  <ebotcazou@adacore.com>
 
 	* gnat.dg/array14.ad[sb]: New test.

gcc/testsuite/gcc.target/arm/neon-vld-1.c

+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O1" } */
+/* { dg-add-options arm_neon } */
+
+#include <arm_neon.h>
+
+uint8x16_t
+foo (uint8_t *a, uint8x16_t b)
+{
+  vst1q_lane_u8 (a, b, 14);
+  return vld1q_lane_u8 (a + 0x100, b, 15);
+}