re PR target/41246 (should "sorry" when regparm=3 and nested functions are encountered)

	PR target/41246
	* config/i386/i386.c (ix86_function_regparm): Do not issue an
	error for nested functions with regparm=3.
	(ix86_compute_frame_layout): Adjust frame pointer offset for
	ix86_static_chain_on_stack.
	(ix86_expand_prologue): Handle ix86_static_chain_on_stack.
	(ix86_emit_restore_reg_using_pop): Increment ix86_cfa_state->offset,
	don't reset to UNITS_PER_WORD.
	(ix86_emit_leave): Adjust ix86_cfa_state.
	(ix86_expand_epilogue): Handle ix86_static_chain_on_stack.
	(ix86_static_chain): New.
	(ix86_trampoline_init): Rename from x86_initialize_trampoline;
	make static; update for target hook parameters; use ix86_static_chain.
	(TARGET_STATIC_CHAIN, TARGET_TRAMPOLINE_INIT): New.
	* config/i386/i386.h (STATIC_CHAIN_REGNUM): Remove.
	(INITIALIZE_TRAMPOLINE): Remove.
	(TRAMPOLINE_SIZE): Use 24 for 64-bit.
	(struct machine_function): Use BOOL_BITFIELD; rearrange bitfields
	to the end.  Add static_chain_on_stack.
	(ix86_static_chain_on_stack): New.

From-SVN: r152018

gcc/ChangeLog

@@ -302,6 +302,26 @@
 	* config/xtensa/xtensa.h (TRAMPOLINE_TEMPLATE): Remove.
 	(INITIALIZE_TRAMPOLINE): Remove.
 
+	* config/i386/i386.c (ix86_function_regparm): Do not issue an
+	error for nested functions with regparm=3.
+	(ix86_compute_frame_layout): Adjust frame pointer offset for
+	ix86_static_chain_on_stack.
+	(ix86_expand_prologue): Handle ix86_static_chain_on_stack.
+	(ix86_emit_restore_reg_using_pop): Increment ix86_cfa_state->offset,
+	don't reset to UNITS_PER_WORD.
+	(ix86_emit_leave): Adjust ix86_cfa_state.
+	(ix86_expand_epilogue): Handle ix86_static_chain_on_stack.
+	(ix86_static_chain): New.
+	(ix86_trampoline_init): Rename from x86_initialize_trampoline;
+	make static; update for target hook parameters; use ix86_static_chain.
+	(TARGET_STATIC_CHAIN, TARGET_TRAMPOLINE_INIT): New.
+	* config/i386/i386.h (STATIC_CHAIN_REGNUM): Remove.
+	(INITIALIZE_TRAMPOLINE): Remove.
+	(TRAMPOLINE_SIZE): Use 24 for 64-bit.
+	(struct machine_function): Use BOOL_BITFIELD; rearrange bitfields
+	to the end.  Add static_chain_on_stack.
+	(ix86_static_chain_on_stack): New.
+
 2009-09-22  Jakub Jelinek  <jakub@redhat.com>
 
 	* config/rs6000/rs6000.c (bdesc_2arg): Fix CODE_FOR_vector_gt* codes

gcc/config/i386/i386.h

@@ -1131,11 +1131,6 @@ enum target_cpu_default
 /* Base register for access to arguments of the function.  */
 #define ARG_POINTER_REGNUM 16
 
-/* Register in which static-chain is passed to a function.
-   We do use ECX as static chain register for 32 bit ABI.  On the
-   64bit ABI, ECX is an argument register, so we use R10 instead.  */
-#define STATIC_CHAIN_REGNUM (TARGET_64BIT ? R10_REG : CX_REG)
-
 /* Register to hold the addressing base for position independent
    code access to data items.  We don't use PIC pointer for 64bit
    mode.  Define the regnum to dummy value to prevent gcc from
@@ -1659,14 +1654,7 @@ typedef struct ix86_args {
 
 /* Length in units of the trampoline for entering a nested function.  */
 
-#define TRAMPOLINE_SIZE (TARGET_64BIT ? 23 : 10)
-
-/* Emit RTL insns to initialize the variable parts of a trampoline.
-   FNADDR is an RTX for the address of the function's pure code.
-   CXT is an RTX for the static chain value for the function.  */
-
-#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
-  x86_initialize_trampoline ((TRAMP), (FNADDR), (CXT))
+#define TRAMPOLINE_SIZE (TARGET_64BIT ? 24 : 10)
 
 /* Definitions for register eliminations.
 
@@ -2365,15 +2353,29 @@ struct GTY(()) machine_function {
   const char *some_ld_name;
   int varargs_gpr_size;
   int varargs_fpr_size;
-  int accesses_prev_frame;
   int optimize_mode_switching[MAX_386_ENTITIES];
-  int needs_cld;
+
+  /* Number of saved registers USE_FAST_PROLOGUE_EPILOGUE
+     has been computed for.  */
+  int use_fast_prologue_epilogue_nregs;
+
+  /* The CFA state at the end of the prologue.  */
+  struct machine_cfa_state cfa;
+
+  /* This value is used for amd64 targets and specifies the current abi
+     to be used. MS_ABI means ms abi. Otherwise SYSV_ABI means sysv abi.  */
+  enum calling_abi call_abi;
+
+  /* Nonzero if the function accesses a previous frame.  */
+  BOOL_BITFIELD accesses_prev_frame : 1;
+
+  /* Nonzero if the function requires a CLD in the prologue.  */
+  BOOL_BITFIELD needs_cld : 1;
+
   /* Set by ix86_compute_frame_layout and used by prologue/epilogue
      expander to determine the style used.  */
-  int use_fast_prologue_epilogue;
-  /* Number of saved registers USE_FAST_PROLOGUE_EPILOGUE has been computed
-     for.  */
-  int use_fast_prologue_epilogue_nregs;
+  BOOL_BITFIELD use_fast_prologue_epilogue : 1;
+
   /* If true, the current function needs the default PIC register, not
      an alternate register (on x86) and must not use the red zone (on
      x86_64), even if it's a leaf function.  We don't want the
@@ -2383,11 +2385,11 @@ struct GTY(()) machine_function {
      if all such instructions are optimized away.  Use the
      ix86_current_function_calls_tls_descriptor macro for a better
      approximation.  */
-  int tls_descriptor_call_expanded_p;
-  /* This value is used for amd64 targets and specifies the current abi
-     to be used. MS_ABI means ms abi. Otherwise SYSV_ABI means sysv abi.  */
-  enum calling_abi call_abi;
-  struct machine_cfa_state cfa;
+  BOOL_BITFIELD tls_descriptor_call_expanded_p : 1;
+
+  /* If true, the current function has a STATIC_CHAIN is placed on the
+     stack below the return address.  */
+  BOOL_BITFIELD static_chain_on_stack : 1;
 };
 #endif
 
@@ -2406,6 +2408,7 @@ struct GTY(()) machine_function {
 #define ix86_current_function_calls_tls_descriptor \
   (ix86_tls_descriptor_calls_expanded_in_cfun && df_regs_ever_live_p (SP_REG))
 #define ix86_cfa_state (&cfun->machine->cfa)
+#define ix86_static_chain_on_stack (cfun->machine->static_chain_on_stack)
 
 /* Control behavior of x86_file_start.  */
 #define X86_FILE_START_VERSION_DIRECTIVE false