Skip to content

R
riscv-gcc-1
Commit 340232b7 by Oleg Endo
Options

re PR target/63260 ([SH] fabs, fneg do not need fp-mode setting and do not use fpscr) 

gcc/
	PR target/63260
	* config/sh/sh.md (negsf2, negsf2_i, negdf2, negdf2_i, abssf2,
	abssf2_i, absdf2, absdf2_i): Remove fp_mode attribute.  Remove use
	of FPSCR.
	(negsf2_i): Rename to *negsf2_i.
	(abssf2_i): Rename to *abssf2_i.
	(negdf2_i): Rename to *negdf2_i.
	(absdf2_i): Rename to *absdf2_i.

gcc/testsuite/
	PR target/63260
	* gcc.target/sh/pr63260.c: New.

From-SVN: r216173
parent f0a81c69
Showing with 68 additions and 58 deletions
gcc/ChangeLog
2014-10-14 Oleg Endo <olegendo@gcc.gnu.org>
PR target/63260
* config/sh/sh.md (negsf2, negsf2_i, negdf2, negdf2_i, abssf2,
abssf2_i, absdf2, absdf2_i): Remove fp_mode attribute. Remove use
of FPSCR.
(negsf2_i): Rename to *negsf2_i.
(abssf2_i): Rename to *abssf2_i.
(negdf2_i): Rename to *negdf2_i.
(absdf2_i): Rename to *absdf2_i.
2014-10-14 Felix Yang <felix.yang@huawei.com>
Jeff Law <law@redhat.com>
gcc/config/sh/sh.md
......@@ -12792,16 +12792,9 @@ label:
})
(define_expand "negsf2"
[(set (match_operand:SF 0 "fp_arith_reg_operand" "")
(neg:SF (match_operand:SF 1 "fp_arith_reg_operand" "")))]
"TARGET_SH2E || TARGET_SHMEDIA_FPU"
{
if (TARGET_SH2E)
{
expand_sf_unop (&gen_negsf2_i, operands);
DONE;
}
})
[(set (match_operand:SF 0 "fp_arith_reg_operand")
(neg:SF (match_operand:SF 1 "fp_arith_reg_operand")))]
"TARGET_SH2E || TARGET_SHMEDIA_FPU")
(define_insn "*negsf2_media"
[(set (match_operand:SF 0 "fp_arith_reg_operand" "=f")
......@@ -12810,14 +12803,12 @@ label:
"fneg.s %1, %0"
[(set_attr "type" "fmove_media")])
(define_insn "negsf2_i"
(define_insn "*negsf2_i"
[(set (match_operand:SF 0 "fp_arith_reg_operand" "=f")
(neg:SF (match_operand:SF 1 "fp_arith_reg_operand" "0")))
(use (match_operand:PSI 2 "fpscr_operand" "c"))]
(neg:SF (match_operand:SF 1 "fp_arith_reg_operand" "0")))]
"TARGET_SH2E"
"fneg %0"
[(set_attr "type" "fmove")
(set_attr "fp_mode" "single")])
[(set_attr "type" "fmove")])
(define_expand "sqrtsf2"
[(set (match_operand:SF 0 "fp_arith_reg_operand" "")
......@@ -12916,16 +12907,9 @@ label:
(set_attr "fp_mode" "single")])
(define_expand "abssf2"
[(set (match_operand:SF 0 "fp_arith_reg_operand" "")
(abs:SF (match_operand:SF 1 "fp_arith_reg_operand" "")))]
"TARGET_SH2E || TARGET_SHMEDIA_FPU"
{
if (TARGET_SH2E)
{
expand_sf_unop (&gen_abssf2_i, operands);
DONE;
}
})
[(set (match_operand:SF 0 "fp_arith_reg_operand")
(abs:SF (match_operand:SF 1 "fp_arith_reg_operand")))]
"TARGET_SH2E || TARGET_SHMEDIA_FPU")
(define_insn "*abssf2_media"
[(set (match_operand:SF 0 "fp_arith_reg_operand" "=f")
......@@ -12934,14 +12918,12 @@ label:
"fabs.s %1, %0"
[(set_attr "type" "fmove_media")])
(define_insn "abssf2_i"
(define_insn "*abssf2_i"
[(set (match_operand:SF 0 "fp_arith_reg_operand" "=f")
(abs:SF (match_operand:SF 1 "fp_arith_reg_operand" "0")))
(use (match_operand:PSI 2 "fpscr_operand" "c"))]
(abs:SF (match_operand:SF 1 "fp_arith_reg_operand" "0")))]
"TARGET_SH2E"
"fabs %0"
[(set_attr "type" "fmove")
(set_attr "fp_mode" "single")])
[(set_attr "type" "fmove")])
(define_expand "adddf3"
[(set (match_operand:DF 0 "fp_arith_reg_operand" "")
......@@ -13247,14 +13229,7 @@ label:
(define_expand "negdf2"
[(set (match_operand:DF 0 "fp_arith_reg_operand")
(neg:DF (match_operand:DF 1 "fp_arith_reg_operand")))]
"(TARGET_SH4 || TARGET_SH2A_DOUBLE) || TARGET_SHMEDIA_FPU"
{
if (TARGET_SH4 || TARGET_SH2A_DOUBLE)
{
expand_df_unop (&gen_negdf2_i, operands);
DONE;
}
})
"(TARGET_SH4 || TARGET_SH2A_DOUBLE) || TARGET_SHMEDIA_FPU")
(define_insn "*negdf2_media"
[(set (match_operand:DF 0 "fp_arith_reg_operand" "=f")
......@@ -13263,14 +13238,12 @@ label:
"fneg.d %1, %0"
[(set_attr "type" "fmove_media")])
(define_insn "negdf2_i"
(define_insn "*negdf2_i"
[(set (match_operand:DF 0 "fp_arith_reg_operand" "=f")
(neg:DF (match_operand:DF 1 "fp_arith_reg_operand" "0")))
(use (match_operand:PSI 2 "fpscr_operand" "c"))]
(neg:DF (match_operand:DF 1 "fp_arith_reg_operand" "0")))]
"(TARGET_SH4 || TARGET_SH2A_DOUBLE)"
"fneg %0"
[(set_attr "type" "fmove")
(set_attr "fp_mode" "double")])
[(set_attr "type" "fmove")])
(define_expand "sqrtdf2"
[(set (match_operand:DF 0 "fp_arith_reg_operand")
......@@ -13303,14 +13276,7 @@ label:
(define_expand "absdf2"
[(set (match_operand:DF 0 "fp_arith_reg_operand")
(abs:DF (match_operand:DF 1 "fp_arith_reg_operand")))]
"(TARGET_SH4 || TARGET_SH2A_DOUBLE) || TARGET_SHMEDIA_FPU"
{
if (TARGET_SH4 || TARGET_SH2A_DOUBLE)
{
expand_df_unop (&gen_absdf2_i, operands);
DONE;
}
})
"(TARGET_SH4 || TARGET_SH2A_DOUBLE) || TARGET_SHMEDIA_FPU")
(define_insn "*absdf2_media"
[(set (match_operand:DF 0 "fp_arith_reg_operand" "=f")
......@@ -13319,14 +13285,12 @@ label:
"fabs.d %1, %0"
[(set_attr "type" "fmove_media")])
(define_insn "absdf2_i"
(define_insn "*absdf2_i"
[(set (match_operand:DF 0 "fp_arith_reg_operand" "=f")
(abs:DF (match_operand:DF 1 "fp_arith_reg_operand" "0")))
(use (match_operand:PSI 2 "fpscr_operand" "c"))]
(abs:DF (match_operand:DF 1 "fp_arith_reg_operand" "0")))]
"(TARGET_SH4 || TARGET_SH2A_DOUBLE)"
"fabs %0"
[(set_attr "type" "fmove")
(set_attr "fp_mode" "double")])
[(set_attr "type" "fmove")])
(define_expand "extendsfdf2"
[(set (match_operand:DF 0 "fp_arith_reg_operand" "")
......
gcc/testsuite/ChangeLog
2014-10-14 Oleg Endo <olegendo@gcc.gnu.org>
PR target/63260
* gcc.target/sh/pr63260.c: New.
2014-10-13 Richard Henderson <rth@redhat.com>
* g++.dg/torture/20141013.C: New.
......@@ -30,8 +35,8 @@
PR target/59401
PR target/54760
* gcc.target/pr54760-5.c: New.
* gcc.target/pr54760-6.c: New.
* gcc.target/sh/pr54760-5.c: New.
* gcc.target/sh/pr54760-6.c: New.
* gcc.target/sh/pr59401-1.c: New.
2014-10-11 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
......
gcc/testsuite/gcc.target/sh/pr63260.c 0 → 100644
/* Check that there is no FPSCR precision mode change generated for fneg and
fabs instructions. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-not "fpscr|fpchg" } } */
float
test_0 (float x)
{
return -x;
}
double
test_1 (double x)
{
return -x;
}
float
test_2 (float x)
{
return __builtin_fabs (x);
}
double
test_3 (double x)
{
return __builtin_abs (x);
}
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment