rs6000: Renumber the registers

This renumbers the registers.

It moves the VRs to 64..95, right after the GPRs and the FPRS.  This
means that the VSRs (which are aliases to the FPRs and the VRs, in
that order) are consecutive now.

It removes MQ, which has been just a stub for ages (it is a leftover
from RIOS, old POWER).

It moves the CR fields to 100..107, which is a bit easier to read
than the 68..75 is was before.

The rest fills the holes.  It should be easy to move anything else
after this series, so the exact order isn't very important anymore,
we aren't stuck with it if we dislike it.

Many things still want the GPRs to be at 0..31, and some things want
the FPRs at 32..63.  I don't think we'll ever want to change that,
so I left it be.

Small things...  It removes DWARF_FRAME_REGISTERS, it used to save
1000 or so words of memory, but it has been just a handful for a
while, and now it is one.  Some whitespace fixes.  Testing showed one
or two places where register allocation was different (not worse, not
better, just different).


	* config/rs6000/rs6000.md (FIRST_ALTIVEC_REGNO, LAST_ALTIVEC_REGNO)
	(LR_REGNO, CTR_REGNO, CA_REGNO, ARG_POINTER_REGNUM, CR0_REGNO)
	(CR1_REGNO, CR2_REGNO, CR3_REGNO, CR4_REGNO, CR5_REGNO, CR6_REGNO)
	(CR7_REGNO, MAX_CR_REGNO, VRSAVE_REGNO, VSCR_REGNO)
	(FRAME_POINTER_REGNUM): Change numbering.
	* config/rs6000/rs6000.c (rs6000_reg_names): Adjust.
	(alt_reg_names): Adjust.
	(rs6000_conditional_register_usage): Don't mark hard register 64 as
	fixed.
	* config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTER): Adjust.
	(DWARF_FRAME_REGISTERS): Delete.
	(DWARF2_FRAME_REG_OUT): Fix whitespace.
	(FIXED_REGISTERS, CALL_USED_REGISTERS, CALL_REALLY_USED_REGISTERS):
	Adjust.
	(REG_ALLOC_ORDER): Adjust.
	(FRAME_POINTER_REGNUM, ARG_POINTER_REGNUM): Adjust.
	(REG_CLASS_CONTENTS): Adjust.
	(RETURN_ADDR_RTX): Change comment.
	(REGNO_OK_FOR_INDEX_P, REGNO_OK_FOR_BASE_P): Use ARG_POINTER_REGNUM
	instead of 67.
	(REGISTER_NAMES): Adjust.
	(ADDITIONAL_REGISTER_NAMES): Adjust.
	* config/rs6000/darwin.h (REGISTER_NAMES): Adjust.

From-SVN: r270929

gcc/ChangeLog

 2019-05-06  Segher Boessenkool  <segher@kernel.crashing.org>
 
+	* config/rs6000/rs6000.md (FIRST_ALTIVEC_REGNO, LAST_ALTIVEC_REGNO)
+	(LR_REGNO, CTR_REGNO, CA_REGNO, ARG_POINTER_REGNUM, CR0_REGNO)
+	(CR1_REGNO, CR2_REGNO, CR3_REGNO, CR4_REGNO, CR5_REGNO, CR6_REGNO)
+	(CR7_REGNO, MAX_CR_REGNO, VRSAVE_REGNO, VSCR_REGNO)
+	(FRAME_POINTER_REGNUM): Change numbering.
+	* config/rs6000/rs6000.c (rs6000_reg_names): Adjust.
+	(alt_reg_names): Adjust.
+	(rs6000_conditional_register_usage): Don't mark hard register 64 as
+	fixed.
+	* config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTER): Adjust.
+	(DWARF_FRAME_REGISTERS): Delete.
+	(DWARF2_FRAME_REG_OUT): Fix whitespace.
+	(FIXED_REGISTERS, CALL_USED_REGISTERS, CALL_REALLY_USED_REGISTERS):
+	Adjust.
+	(REG_ALLOC_ORDER): Adjust.
+	(FRAME_POINTER_REGNUM, ARG_POINTER_REGNUM): Adjust.
+	(REG_CLASS_CONTENTS): Adjust.
+	(RETURN_ADDR_RTX): Change comment.
+	(REGNO_OK_FOR_INDEX_P, REGNO_OK_FOR_BASE_P): Use ARG_POINTER_REGNUM
+	instead of 67.
+	(REGISTER_NAMES): Adjust.
+	(ADDITIONAL_REGISTER_NAMES): Adjust.
+	* config/rs6000/darwin.h (REGISTER_NAMES): Adjust.
+
+2019-05-06  Segher Boessenkool  <segher@kernel.crashing.org>
+
 	* config/rs6000/rs6000.md (TFHAR_REGNO, TFIAR_REGNO, TEXASR_REGNO):
 	Delete.
 	* config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTER): Adjust.

gcc/config/rs6000/darwin.h

@@ -215,23 +215,27 @@ extern int darwin_emit_branch_islands;
 #undef REGISTER_NAMES
 #define REGISTER_NAMES							\
 {									\
+  /* GPRs */								\
      "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",		\
      "r8",  "r9", "r10", "r11", "r12", "r13", "r14", "r15",		\
     "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",		\
     "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",		\
+  /* FPRs */								\
      "f0",  "f1",  "f2",  "f3",  "f4",  "f5",  "f6",  "f7",		\
      "f8",  "f9", "f10", "f11", "f12", "f13", "f14", "f15",		\
     "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",		\
     "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",		\
-     "mq",  "lr", "ctr",  "ap",						\
+  /* VRs */								\
+     "v0",  "v1",  "v2",  "v3",  "v4",  "v5",  "v6",  "v7",		\
+     "v8",  "v9", "v10", "v11", "v12", "v13", "v14", "v15",		\
+    "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",		\
+    "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",		\
+  /* lr ctr ca ap */							\
+     "lr", "ctr", "xer",  "ap",						\
+  /* cr0..cr7 */							\
     "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",		\
-    "xer",								\
-     "v0",  "v1",  "v2",  "v3",  "v4",  "v5",  "v6",  "v7",             \
-     "v8",  "v9", "v10", "v11", "v12", "v13", "v14", "v15",             \
-    "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",             \
-    "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",             \
-    "vrsave", "vscr",							\
-    "sfp"								\
+  /* vrsave vscr sfp */							\
+    "vrsave", "vscr", "sfp"						\
 }
 
 /* This outputs NAME to FILE.  */

gcc/config/rs6000/rs6000.c

@@ -1464,53 +1464,53 @@ static GTY (()) hash_table<builtin_hasher> *builtin_hash_table;
 /* Default register names.  */
 char rs6000_reg_names[][8] =
 {
+  /* GPRs */
       "0",  "1",  "2",  "3",  "4",  "5",  "6",  "7",
       "8",  "9", "10", "11", "12", "13", "14", "15",
      "16", "17", "18", "19", "20", "21", "22", "23",
      "24", "25", "26", "27", "28", "29", "30", "31",
+  /* FPRs */
       "0",  "1",  "2",  "3",  "4",  "5",  "6",  "7",
       "8",  "9", "10", "11", "12", "13", "14", "15",
      "16", "17", "18", "19", "20", "21", "22", "23",
      "24", "25", "26", "27", "28", "29", "30", "31",
-     "mq", "lr", "ctr","ap",
+  /* VRs */
       "0",  "1",  "2",  "3",  "4",  "5",  "6",  "7",
-      "ca",
-      /* AltiVec registers.  */
-      "0",  "1",  "2",  "3",  "4",  "5",  "6", "7",
-      "8",  "9",  "10", "11", "12", "13", "14", "15",
-      "16", "17", "18", "19", "20", "21", "22", "23",
-      "24", "25", "26", "27", "28", "29", "30", "31",
-      "vrsave", "vscr",
-      /* Soft frame pointer.  */
-      "sfp",
-      /* HTM SPR registers.  */
-      "tfhar", "tfiar", "texasr"
+      "8",  "9", "10", "11", "12", "13", "14", "15",
+     "16", "17", "18", "19", "20", "21", "22", "23",
+     "24", "25", "26", "27", "28", "29", "30", "31",
+  /* lr ctr ca ap */
+     "lr", "ctr", "ca", "ap",
+  /* cr0..cr7 */
+      "0",  "1",  "2",  "3",  "4",  "5",  "6",  "7",
+  /* vrsave vscr sfp */
+      "vrsave", "vscr", "sfp",
 };
 
 #ifdef TARGET_REGNAMES
 static const char alt_reg_names[][8] =
 {
-   "%r0",   "%r1",  "%r2",  "%r3",  "%r4",  "%r5",  "%r6",  "%r7",
-   "%r8",   "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
-  "%r16",  "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
-  "%r24",  "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
-   "%f0",   "%f1",  "%f2",  "%f3",  "%f4",  "%f5",  "%f6",  "%f7",
-   "%f8",   "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
-  "%f16",  "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
-  "%f24",  "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
-    "mq",    "lr",  "ctr",   "ap",
-  "%cr0",  "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
-   "ca",
-  /* AltiVec registers.  */
-   "%v0",  "%v1",  "%v2",  "%v3",  "%v4",  "%v5",  "%v6", "%v7",
+  /* GPRs */
+   "%r0",  "%r1",  "%r2",  "%r3",  "%r4",  "%r5",  "%r6",  "%r7",
+   "%r8",  "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
+  "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
+  "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
+  /* FPRs */
+   "%f0",  "%f1",  "%f2",  "%f3",  "%f4",  "%f5",  "%f6",  "%f7",
+   "%f8",  "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
+  "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
+  "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
+  /* VRs */
+   "%v0",  "%v1",  "%v2",  "%v3",  "%v4",  "%v5",  "%v6",  "%v7",
    "%v8",  "%v9", "%v10", "%v11", "%v12", "%v13", "%v14", "%v15",
   "%v16", "%v17", "%v18", "%v19", "%v20", "%v21", "%v22", "%v23",
   "%v24", "%v25", "%v26", "%v27", "%v28", "%v29", "%v30", "%v31",
-  "vrsave", "vscr",
-  /* Soft frame pointer.  */
-  "sfp",
-  /* HTM SPR registers.  */
-  "tfhar", "tfiar", "texasr"
+  /* lr ctr ca ap */
+    "lr",  "ctr",   "ca",   "ap",
+  /* cr0..cr7 */
+  "%cr0",  "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
+  /* vrsave vscr sfp */
+  "vrsave", "vscr", "sfp",
 };
 #endif
 
@@ -9495,10 +9495,6 @@ rs6000_conditional_register_usage (void)
   if (TARGET_DEBUG_TARGET)
     fprintf (stderr, "rs6000_conditional_register_usage called\n");
 
-  /* Set MQ register fixed (already call_used) so that it will not be
-     allocated.  */
-  fixed_regs[64] = 1;
-
   /* 64-bit AIX and Linux reserve GPR13 for thread-private data.  */
   if (TARGET_64BIT)
     fixed_regs[13] = call_used_regs[13]

gcc/config/rs6000/rs6000.md

@@ -33,24 +33,24 @@
    (LAST_GPR_REGNO		31)
    (FIRST_FPR_REGNO		32)
    (LAST_FPR_REGNO		63)
-   (LR_REGNO			65)
-   (CTR_REGNO			66)
-   (ARG_POINTER_REGNUM		67)
-   (CR0_REGNO			68)
-   (CR1_REGNO			69)
-   (CR2_REGNO			70)
-   (CR3_REGNO			71)
-   (CR4_REGNO			72)
-   (CR5_REGNO			73)
-   (CR6_REGNO			74)
-   (CR7_REGNO			75)
-   (MAX_CR_REGNO		75)
-   (CA_REGNO			76)
-   (FIRST_ALTIVEC_REGNO		77)
-   (LAST_ALTIVEC_REGNO		108)
-   (VRSAVE_REGNO		109)
-   (VSCR_REGNO			110)
-   (FRAME_POINTER_REGNUM	111)
+   (FIRST_ALTIVEC_REGNO		64)
+   (LAST_ALTIVEC_REGNO		95)
+   (LR_REGNO			96)
+   (CTR_REGNO			97)
+   (CA_REGNO			98)
+   (ARG_POINTER_REGNUM		99)
+   (CR0_REGNO			100)
+   (CR1_REGNO			101)
+   (CR2_REGNO			102)
+   (CR3_REGNO			103)
+   (CR4_REGNO			104)
+   (CR5_REGNO			105)
+   (CR6_REGNO			106)
+   (CR7_REGNO			107)
+   (MAX_CR_REGNO		107)
+   (VRSAVE_REGNO		108)
+   (VSCR_REGNO			109)
+   (FRAME_POINTER_REGNUM	110)
   ])
 
 ;;