re PR target/42516 ([m68k] Suboptimal halfword swap on coldfire)

PR target/42516
* config/m68k/m68k.md (rotlsi_16): New insn.

From-SVN: r155527

gcc/ChangeLog

+2009-12-30  Andreas Schwab  <schwab@linux-m68k.org>
+
+	PR target/42516
+	* config/m68k/m68k.md (rotlsi_16): New insn.
+
 2009-12-30  Joseph Myers  <joseph@codesourcery.com>
 
 	PR c/42439
@@ -8,7 +13,7 @@
 2009-12-30  Ira Rosen  <irar@il.ibm.com>
 
 	PR tree-optimization/41956
-	* tree-vect-slp.c (vect_supported_load_permutation_p): Add check that 
+	* tree-vect-slp.c (vect_supported_load_permutation_p): Add check that
 	the load indices differ.
 
 2009-12-30  Uros Bizjak  <ubizjak@gmail.com>

gcc/config/m68k/m68k.md

 ;;- Machine description for GNU compiler, Motorola 68000 Version
 ;;  Copyright (C) 1987, 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2001,
-;;  2002, 2003, 2004, 2005, 2006, 2007, 2008
+;;  2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
 ;;  Free Software Foundation, Inc.
 
 ;; This file is part of GCC.
@@ -5368,6 +5368,14 @@
 
 ;; rotate instructions
 
+(define_insn "rotlsi_16"
+  [(set (match_operand:SI 0 "register_operand" "=d")
+	(rotate:SI (match_operand:SI 1 "register_operand" "0")
+		   (const_int 16)))]
+  ""
+  "swap %0"
+  [(set_attr "type" "shift")])
+
 (define_insn "rotlsi3"
   [(set (match_operand:SI 0 "register_operand" "=d")
 	(rotate:SI (match_operand:SI 1 "register_operand" "0")