avr-protos.h (avr_out_sbxx_branch): Declare.

	* config/avr/avr-protos.h (avr_out_sbxx_branch): Declare.
	* config/avr/avr.c (jump_over_one_insn_p): Take length of the
	branch insn into account, do not assume 1.
	(avr_out_sbxx_branch): New function.  Optimize cases of skipping
	over single word insn.  Handle upper half of I/O space too.
	* config/avr/avr.md (*sbrx_branch): Use it.
	(*sbrx_and_branchhi, *sbrx_and_branchsi): Likewise.
	(*sbix_branch, *sbix_branch_bit7): Likewise.
	(*sbix_branch_tmp, *sbix_branch_tmp_bit7): New.
	Use RTL peepholes to optimize register operand sign tests.

From-SVN: r53906

gcc/ChangeLog

@@ -27,6 +27,19 @@
 
 2002-05-26  Marek Michalkiewicz  <marekm@amelek.gda.pl>
 
+	* config/avr/avr-protos.h (avr_out_sbxx_branch): Declare.
+	* config/avr/avr.c (jump_over_one_insn_p): Take length of the
+	branch insn into account, do not assume 1.
+	(avr_out_sbxx_branch): New function.  Optimize cases of skipping
+	over single word insn.  Handle upper half of I/O space too.
+	* config/avr/avr.md (*sbrx_branch): Use it.
+	(*sbrx_and_branchhi, *sbrx_and_branchsi): Likewise.
+	(*sbix_branch, *sbix_branch_bit7): Likewise.
+	(*sbix_branch_tmp, *sbix_branch_tmp_bit7): New.
+	Use RTL peepholes to optimize register operand sign tests.
+
+2002-05-26  Marek Michalkiewicz  <marekm@amelek.gda.pl>
+
 	* config/avr/avr.c (avr_asm_only_p): New variable.
 	(avr_override_options): Set it here if AVR1.
 	(asm_file_start): Test it here, report an error if set.

gcc/config/avr/avr-protos.h

@@ -98,6 +98,7 @@ extern const char * lshrsi3_out PARAMS ((rtx insn, rtx operands[], int *len));
 
 extern void avr_output_bld PARAMS ((rtx operands[], int bit_nr));
 extern void avr_output_addr_vec_elt PARAMS ((FILE *stream, int value));
+extern const char *avr_out_sbxx_branch PARAMS ((rtx insn, rtx operands[]));
 
 extern enum reg_class preferred_reload_class PARAMS ((rtx x,
 						     enum reg_class class));

gcc/config/avr/avr.c

@@ -5233,7 +5233,7 @@ jump_over_one_insn_p (insn, dest)
 		      : dest);
   int jump_addr = INSN_ADDRESSES (INSN_UID (insn));
   int dest_addr = INSN_ADDRESSES (uid);
-  return dest_addr - jump_addr == 2;
+  return dest_addr - jump_addr == get_attr_length (insn) + 1;
 }
 
 /* Returns 1 if a value of mode MODE can be stored starting with hard
@@ -5451,3 +5451,76 @@ avr_peep2_scratch_safe (scratch)
     }
   return 1;
 }
+
+/* Output a branch that tests a single bit of a register (QI, HI or SImode)
+   or memory location in the I/O space (QImode only).
+
+   Operand 0: comparison operator (must be EQ or NE, compare bit to zero).
+   Operand 1: register operand to test, or CONST_INT memory address.
+   Operand 2: bit number (for QImode operand) or mask (HImode, SImode).
+   Operand 3: label to jump to if the test is true.  */
+
+const char *
+avr_out_sbxx_branch (insn, operands)
+     rtx insn;
+     rtx operands[];
+{
+  enum rtx_code comp = GET_CODE (operands[0]);
+  int long_jump = (get_attr_length (insn) >= 4);
+  int reverse = long_jump || jump_over_one_insn_p (insn, operands[3]);
+
+  if (comp == GE)
+    comp = EQ;
+  else if (comp == LT)
+    comp = NE;
+
+  if (reverse)
+    comp = reverse_condition (comp);
+
+  if (GET_CODE (operands[1]) == CONST_INT)
+    {
+      if (INTVAL (operands[1]) < 0x40)
+	{
+	  if (comp == EQ)
+	    output_asm_insn (AS2 (sbis,%1-0x20,%2), operands);
+	  else
+	    output_asm_insn (AS2 (sbic,%1-0x20,%2), operands);
+	}
+      else
+	{
+	  output_asm_insn (AS2 (in,__tmp_reg__,%1-0x20), operands);
+	  if (comp == EQ)
+	    output_asm_insn (AS2 (sbrs,__tmp_reg__,%2), operands);
+	  else
+	    output_asm_insn (AS2 (sbrc,__tmp_reg__,%2), operands);
+	}
+    }
+  else  /* GET_CODE (operands[1]) == REG */
+    {
+      if (GET_MODE (operands[1]) == QImode)
+	{
+	  if (comp == EQ)
+	    output_asm_insn (AS2 (sbrs,%1,%2), operands);
+	  else
+	    output_asm_insn (AS2 (sbrc,%1,%2), operands);
+	}
+      else  /* HImode or SImode */
+	{
+	  static char buf[] = "sbrc %A1,0";
+	  int bit_nr = exact_log2 (INTVAL (operands[2])
+				   & GET_MODE_MASK (GET_MODE (operands[1])));
+
+	  buf[3] = (comp == EQ) ? 's' : 'c';
+	  buf[6] = 'A' + (bit_nr >> 3);
+	  buf[9] = '0' + (bit_nr & 7);
+	  output_asm_insn (buf, operands);
+	}
+    }
+
+  if (long_jump)
+    return (AS1 (rjmp,_PC_+4) CR_TAB
+	    AS1 (jmp,%3));
+  if (!reverse)
+    return AS1 (rjmp,%3);
+  return "";
+}