constraints.md: New file.

	* config/sh/constraints.md: New file.
	* config/sh/sh.c: Include tm-constrs.h.
	(reg_class_from_letter): Remove.
	(prepare_cbranch_operands): Use satisfies_constraint_*
	function instead of macro.
	(andcosts, broken_move, sh_secondary_reload): Likewise.
	* config/sh/predicates.md (trapping_target_operand): Likewise.
	(and_operand, arith_operand, arith_reg_or_0_operand,
	cmp_operand, logical_operand, target_operand,
	ua_address_operand, ua_offset, xor_operand): Likewise.
	* config/sh/sh.md: Include constraints.md.
	(*movsicc_t_false): Use satisfies_constraint_* function
	instead of macro.
	(*movsicc_t_true, ashlsi3_std, ashlhi3_k, lshrsi3_m,
	lshrsi3_k, movsi_const_16bit+2, *movhi_media+1,
	movdi_const_16bit+1, beq, bne, *ptb): Likewise.
	* config/sh/sh.h (reg_class_from_letter): Remove prototype.
	(OVERRIDE_OPTIONS): Don't modify reg_class_from_letter.
	(REG_CLASS_FROM_CONSTRAINT): Remove.
	(CONSTRAINT_LEN, CONST_OK_FOR_I20, CONST_OK_FOR_I,
	CONST_OK_FOR_J, CONST_OK_FOR_K16, CONST_OK_FOR_K,
	CONST_OK_FOR_P27, CONST_OK_FOR_P, CONST_OK_FOR_M,
	CONST_OK_FOR_N, CONST_OK_FOR_CONSTRAINT_P,
	CONST_DOUBLE_OK_FOR_LETTER_P): Likewise.
	(SECONDARY_INOUT_RELOAD_CLASS): Use satisfies_constraint_*
	function instead of macro.
	(SECONDARY_INPUT_RELOAD_CLASS): Likewise.
	(EXTRA_CONSTRAINT_Q, EXTRA_CONSTRAINT_A,
	EXTRA_CONSTRAINT_Bsc, EXTRA_CONSTRAINT_B,
	EXTRA_CONSTRAINT_Css, EXTRA_CONSTRAINT_Csu): Remove.
	(IS_PC_RELATIVE_LOAD_ADDR_P): New macro.
	(IS_LITERAL_OR_SYMBOLIC_S16_P): Likewise.
	(IS_LITERAL_OR_SYMBOLIC_U16_P): Likewise.
	(IS_NON_EXPLICIT_CONSTANT_P): Likewise.
	(EXTRA_CONSTRAINT_Csy, EXTRA_CONSTRAINT_Z, EXTRA_CONSTRAINT_W,
	EXTRA_CONSTRAINT_Cpg, EXTRA_CONSTRAINT_C,
	EXTRA_MEMORY_CONSTRAINT, EXTRA_CONSTRAINT_Sr0,
	EXTRA_CONSTRAINT_Sua, EXTRA_CONSTRAINT_S,
	EXTRA_CONSTRAINT_STR): Likewise.
	(GO_IF_LEGITIMATE_INDEX): Fix indentation.

From-SVN: r125561

gcc/ChangeLog

+2007-06-08  Kaz Kojima  <kkojima@gcc.gnu.org>
+
+	* config/sh/constraints.md: New file.
+	* config/sh/sh.c: Include tm-constrs.h.
+	(reg_class_from_letter): Remove.
+	(prepare_cbranch_operands): Use satisfies_constraint_*
+	function instead of macro.
+	(andcosts, broken_move, sh_secondary_reload): Likewise.
+	* config/sh/predicates.md (trapping_target_operand): Likewise.
+	(and_operand, arith_operand, arith_reg_or_0_operand,
+	cmp_operand, logical_operand, target_operand,
+	ua_address_operand, ua_offset, xor_operand): Likewise.
+	* config/sh/sh.md: Include constraints.md.
+	(*movsicc_t_false): Use satisfies_constraint_* function
+	instead of macro.
+	(*movsicc_t_true, ashlsi3_std, ashlhi3_k, lshrsi3_m,
+	lshrsi3_k, movsi_const_16bit+2, *movhi_media+1,
+	movdi_const_16bit+1, beq, bne, *ptb): Likewise.
+	* config/sh/sh.h (reg_class_from_letter): Remove prototype.
+	(OVERRIDE_OPTIONS): Don't modify reg_class_from_letter.
+	(REG_CLASS_FROM_CONSTRAINT): Remove.
+	(CONSTRAINT_LEN, CONST_OK_FOR_I20, CONST_OK_FOR_I,
+	CONST_OK_FOR_J, CONST_OK_FOR_K16, CONST_OK_FOR_K,
+	CONST_OK_FOR_P27, CONST_OK_FOR_P, CONST_OK_FOR_M,
+	CONST_OK_FOR_N, CONST_OK_FOR_CONSTRAINT_P,
+	CONST_DOUBLE_OK_FOR_LETTER_P): Likewise.
+	(SECONDARY_INOUT_RELOAD_CLASS): Use satisfies_constraint_*
+	function instead of macro.
+	(SECONDARY_INPUT_RELOAD_CLASS): Likewise.
+	(EXTRA_CONSTRAINT_Q, EXTRA_CONSTRAINT_A,
+	EXTRA_CONSTRAINT_Bsc, EXTRA_CONSTRAINT_B,
+	EXTRA_CONSTRAINT_Css, EXTRA_CONSTRAINT_Csu): Remove.
+	(IS_PC_RELATIVE_LOAD_ADDR_P): New macro.
+	(IS_LITERAL_OR_SYMBOLIC_S16_P): Likewise.
+	(IS_LITERAL_OR_SYMBOLIC_U16_P): Likewise.
+	(IS_NON_EXPLICIT_CONSTANT_P): Likewise.
+	(EXTRA_CONSTRAINT_Csy, EXTRA_CONSTRAINT_Z, EXTRA_CONSTRAINT_W,
+	EXTRA_CONSTRAINT_Cpg, EXTRA_CONSTRAINT_C,
+	EXTRA_MEMORY_CONSTRAINT, EXTRA_CONSTRAINT_Sr0,
+	EXTRA_CONSTRAINT_Sua, EXTRA_CONSTRAINT_S,
+	EXTRA_CONSTRAINT_STR): Likewise.
+	(GO_IF_LEGITIMATE_INDEX): Fix indentation.
+
 2007-06-07  Geoffrey Keating  <geoffk@apple.com>
 
 	* config/i386/darwin.h (STACK_BOUNDARY): Define.

gcc/config/sh/constraints.md

+;; Constraint definitions for Renesas / SuperH SH.
+;; Copyright (C) 2007 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 2, or (at your option)
+;; any later version.
+;;
+;; GCC is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+;; GNU General Public License for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING.  If not, write to
+;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+;; Boston, MA 02110-1301, USA.
+
+;; Overview of uppercase letter constraints:
+;; Bxx: miscellaneous constraints
+;;  Bsc: SCRATCH - for the scratch register in movsi_ie in the
+;;       fldi0 / fldi0 cases
+;; Cxx: Constants other than only CONST_INT
+;;  Css: signed 16-bit constant, literal or symbolic
+;;  Csu: unsigned 16-bit constant, literal or symbolic
+;;  Csy: label or symbol
+;;  Cpg: non-explicit constants that can be directly loaded into a general
+;;       purpose register in PIC code.  like 's' except we don't allow
+;;       PIC_DIRECT_ADDR_P
+;; IJKLMNOP: CONT_INT constants
+;;  Ixx: signed xx bit
+;;  J16: 0xffffffff00000000 | 0x00000000ffffffff
+;;  Kxx: unsigned xx bit
+;;  M: 1
+;;  N: 0
+;;  P27: 1 | 2 | 8 | 16
+;; Q: pc relative load operand
+;; Rxx: reserved for exotic register classes.
+;; Sxx: extra memory (storage) constraints
+;;  Sua: unaligned memory operations
+;; W: vector
+;; Z: zero in any mode
+;;
+;; unused CONST_INT constraint letters: LO
+;; unused EXTRA_CONSTRAINT letters: D T U Y
+
+;; Register constraints
+(define_register_constraint "a" "ALL_REGS"
+  "@internal")
+
+(define_register_constraint "b" "TARGET_REGS"
+  "Branch target registers.")
+
+(define_register_constraint "c" "FPSCR_REGS"
+  "Floating-point status register.")
+
+(define_register_constraint "d" "DF_REGS"
+  "Double precision floating-point register.")
+
+(define_register_constraint "e" "TARGET_FMOVD ? NO_REGS : FP_REGS"
+  "Floating-point register.")
+
+(define_register_constraint "f" "FP_REGS"
+  "Floating-point register.")
+
+(define_register_constraint "k" "SIBCALL_REGS"
+  "@internal")
+
+(define_register_constraint "l" "PR_REGS"
+  "PR register.")
+
+(define_register_constraint "t" "T_REGS"
+  "T register.")
+
+(define_register_constraint "w" "FP0_REGS"
+  "Floating-point register 0.")
+
+(define_register_constraint "x" "MAC_REGS"
+  "MACH and MACL registers.")
+
+(define_register_constraint "y" "FPUL_REGS"
+  "FPUL register.")
+
+(define_register_constraint "z" "R0_REGS"
+  "R0 register.")
+
+;; Integer constraints
+(define_constraint "I06"
+  "A signed 6-bit constant, as used in SHmedia beqi, bnei and xori."
+  (and (match_code "const_int")
+       (match_test "ival >= -32 && ival <= 31")))
+
+(define_constraint "I08"
+  "A signed 8-bit constant, as used in add, sub, etc."
+  (and (match_code "const_int")
+       (match_test "ival >= -128 && ival <= 127")))
+
+(define_constraint "I10"
+  "A signed 10-bit constant, as used in in SHmedia andi, ori."
+  (and (match_code "const_int")
+       (match_test "ival >= -512 && ival <= 511")))
+
+(define_constraint "I16"
+  "A signed 16-bit constant, as used in SHmedia movi."
+  (and (match_code "const_int")
+       (match_test "ival >= -32768 && ival <= 32767")))
+
+(define_constraint "I20"
+  "A signed 20-bit constant, as used in SH2A movi20."
+  (and (match_code "const_int")
+       (match_test "ival >= -524288 && ival <= 524287")
+       (match_test "TARGET_SH2A")))
+
+(define_constraint "J16"
+  "0xffffffff00000000 or 0x00000000ffffffff."
+  (and (match_code "const_int")
+       (match_test "CONST_OK_FOR_J16 (ival)")))
+
+(define_constraint "K08"
+  "An unsigned 8-bit constant, as used in and, or, etc."
+  (and (match_code "const_int")
+       (match_test "ival >= 0 && ival <= 255")))
+ 
+(define_constraint "K16"
+  "An unsigned 16-bit constant, as used in SHmedia shori."
+  (and (match_code "const_int")
+       (match_test "ival >= 0 && ival <= 65535")))
+ 
+(define_constraint "P27"
+  "A constant for shift operand 1,2,8 or 16."
+  (and (match_code "const_int")
+       (match_test "ival == 1 || ival == 2 || ival == 8 || ival == 16")))
+
+(define_constraint "M"
+  "Integer constant 1."
+  (and (match_code "const_int")
+       (match_test "ival == 1")))
+
+(define_constraint "N"
+  "Integer constant 0."
+  (and (match_code "const_int")
+       (match_test "ival == 0")))
+
+;; Floating-point constraints
+(define_constraint "G"
+  "Double constant 0."
+  (and (match_code "const_double")
+       (match_test "fp_zero_operand (op) && fldi_ok ()")))
+
+(define_constraint "H"
+  "Double constant 1."
+  (and (match_code "const_double")
+       (match_test "fp_one_operand (op) && fldi_ok ()")))
+
+;; Extra constraints
+(define_constraint "Q"
+  "A pc relative load operand."
+  (and (match_code "mem")
+       (match_test "IS_PC_RELATIVE_LOAD_ADDR_P (XEXP (op, 0))")))
+
+(define_constraint "Bsc"
+  "Constraint for selecting FLDI0 or FLDI1 instruction.  If the clobber
+   operand is not SCRATCH (i.e. REG) then R0 is probably being used,
+   hence mova is being used, hence do not select this pattern."
+  (match_code "scratch"))
+
+(define_constraint "Css"
+  "A signed 16-bit constant, literal or symbolic."
+  (and (match_code "const")
+       (match_test "IS_LITERAL_OR_SYMBOLIC_S16_P (XEXP (op, 0))")))
+
+(define_constraint "Csu"
+  "An unsigned 16-bit constant, literal or symbolic."
+  (and (match_code "const")
+       (match_test "IS_LITERAL_OR_SYMBOLIC_U16_P (XEXP (op, 0))")))
+
+(define_constraint "Csy"
+  "A label or a symbol."
+  (ior (match_test "NON_PIC_REFERENCE_P (op)")
+       (match_test "PIC_DIRECT_ADDR_P (op)")))
+
+(define_constraint "Z"
+  "A zero in any shape or form."
+  (match_test "op == CONST0_RTX (GET_MODE (op))"))
+
+(define_constraint "W"
+  "Any vector constant we can handle."
+  (and (match_code "const_vector")
+       (ior (match_test "sh_rep_vec (op, VOIDmode)")
+	    (match_test "HOST_BITS_PER_WIDE_INT >= 64
+			 ? sh_const_vec (op, VOIDmode)
+			 : sh_1el_vec (op, VOIDmode)"))))
+
+(define_constraint "Cpg"
+  "A non-explicit constant that can be loaded directly into a general
+   purpose register.  This is like 's' except we don't allow
+   PIC_DIRECT_ADDR_P."
+  (match_test "IS_NON_EXPLICIT_CONSTANT_P (op)"))
+
+(define_memory_constraint "Sr0"
+  "@internal"
+  (and (match_test "memory_operand (op, GET_MODE (op))")
+       (match_test "!refers_to_regno_p (R0_REG, R0_REG + 1, op, (rtx *) 0)")))
+
+(define_memory_constraint "Sua"
+  "@internal"
+  (and (match_test "memory_operand (op, GET_MODE (op))")
+       (match_test "GET_CODE (XEXP (op, 0)) != PLUS")))

gcc/config/sh/predicates.md

 ;; Predicate definitions for Renesas / SuperH SH.
-;; Copyright (C) 2005, 2006 Free Software Foundation, Inc.
+;; Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc.
 ;;
 ;; This file is part of GCC.
 ;;
@@ -40,13 +40,13 @@
   if (GET_CODE (cond) == CONST)
     {
       cond = XEXP (cond, 0);
-      if (!EXTRA_CONSTRAINT_Csy (tar))
+      if (!satisfies_constraint_Csy (tar))
 	return 0;
       if (GET_CODE (tar) == CONST)
 	tar = XEXP (tar, 0);
     }
   else if (!arith_reg_operand (tar, VOIDmode)
-	   && ! EXTRA_CONSTRAINT_Csy (tar))
+	   && ! satisfies_constraint_Csy (tar))
     return 0;
   if (GET_CODE (cond) != EQ)
     return 0;
@@ -70,8 +70,7 @@
   /* Check mshflo.l / mshflhi.l opportunities.  */
   if (TARGET_SHMEDIA
       && mode == DImode
-      && GET_CODE (op) == CONST_INT
-      && CONST_OK_FOR_J16 (INTVAL (op)))
+      && satisfies_constraint_J16 (op))
     return 1;
 
   return 0;
@@ -106,12 +105,12 @@
   if (TARGET_SHMEDIA)
     {
       /* FIXME: We should be checking whether the CONST_INT fits in a
-	 CONST_OK_FOR_I16 here, but this causes reload_cse to crash when
+	 signed 16-bit here, but this causes reload_cse to crash when
 	 attempting to transform a sequence of two 64-bit sets of the
 	 same register from literal constants into a set and an add,
 	 when the difference is too wide for an add.  */
       if (GET_CODE (op) == CONST_INT
-	  || EXTRA_CONSTRAINT_Css (op))
+	  || satisfies_constraint_Css (op))
 	return 1;
       else if (GET_CODE (op) == TRUNCATE
 	       && ! system_reg_operand (XEXP (op, 0), VOIDmode)
@@ -124,7 +123,7 @@
       else
 	return 0;
     }
-  else if (GET_CODE (op) == CONST_INT && CONST_OK_FOR_I08 (INTVAL (op)))
+  else if (satisfies_constraint_I08 (op))
     return 1;
 
   return 0;
@@ -198,7 +197,7 @@
   if (arith_reg_operand (op, mode))
     return 1;
 
-  if (EXTRA_CONSTRAINT_Z (op))
+  if (satisfies_constraint_Z (op))
     return 1;
 
   return 0;
@@ -240,7 +239,7 @@
 (define_predicate "cmp_operand"
   (match_code "subreg,reg,const_int")
 {
-  if (GET_CODE (op) == CONST_INT && CONST_OK_FOR_N (INTVAL (op)))
+  if (satisfies_constraint_N (op))
     return 1;
   if (TARGET_SHMEDIA
       && mode != DImode && GET_CODE (op) == SUBREG
@@ -502,12 +501,12 @@
 
   if (TARGET_SHMEDIA)
     {
-      if (GET_CODE (op) == CONST_INT && CONST_OK_FOR_I10 (INTVAL (op)))
+      if (satisfies_constraint_I10 (op))
 	return 1;
       else
 	return 0;
     }
-  else if (GET_CODE (op) == CONST_INT && CONST_OK_FOR_K08 (INTVAL (op)))
+  else if (satisfies_constraint_K08 (op))
     return 1;
 
   return 0;
@@ -705,7 +704,7 @@
     return 0;
 
   if ((GET_MODE (op) == Pmode || GET_MODE (op) == VOIDmode)
-      && EXTRA_CONSTRAINT_Csy (op))
+      && satisfies_constraint_Csy (op))
     return ! reload_completed;
 
   return target_reg_operand (op, mode);
@@ -756,8 +755,7 @@
   (match_code "subreg,reg,plus")
 {
   if (GET_CODE (op) == PLUS
-      && (GET_CODE (XEXP (op, 1)) != CONST_INT
-	  || ! CONST_OK_FOR_I06 (INTVAL (XEXP (op, 1)))))
+      && (! satisfies_constraint_I06 (XEXP (op, 1))))
     return 0;
   return address_operand (op, QImode);
 })
@@ -767,7 +765,7 @@
 (define_predicate "ua_offset"
   (match_code "const_int")
 {
-  return GET_CODE (op) == CONST_INT && CONST_OK_FOR_I06 (INTVAL (op));
+  return satisfies_constraint_I06 (op);
 })
 
 ;; TODO: Add a comment here.
@@ -783,9 +781,9 @@
 {
   if (GET_CODE (op) == CONST_INT)
     return (TARGET_SHMEDIA
-	    ? (CONST_OK_FOR_I06 (INTVAL (op))
+	    ? (satisfies_constraint_I06 (op)
 	       || (no_new_pseudos && INTVAL (op) == 0xff))
-	    : CONST_OK_FOR_K08 (INTVAL (op)));
+	    : satisfies_constraint_K08 (op));
   if (TARGET_SHMEDIA
       && mode != DImode && GET_CODE (op) == SUBREG
       && GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))) > 4)

gcc/config/sh/sh.c

@@ -54,6 +54,7 @@ Boston, MA 02110-1301, USA.  */
 #include "tree-gimple.h"
 #include "cfgloop.h"
 #include "alloc-pool.h"
+#include "tm-constrs.h"
 
 
 int code_for_indirect_jump_scratch = CODE_FOR_indirect_jump_scratch;
@@ -153,21 +154,6 @@ char sh_additional_register_names[ADDREGNAMES_SIZE] \
   [MAX_ADDITIONAL_REGISTER_NAME_LENGTH + 1]
   = SH_ADDITIONAL_REGISTER_NAMES_INITIALIZER;
 
-/* Provide reg_class from a letter such as appears in the machine
-   description.  *: target independently reserved letter.
-   reg_class_from_letter['e' - 'a'] is set to NO_REGS for TARGET_FMOVD.  */
-
-enum reg_class reg_class_from_letter[] =
-{
-  /* a */ ALL_REGS,  /* b */ TARGET_REGS, /* c */ FPSCR_REGS, /* d */ DF_REGS,
-  /* e */ FP_REGS,   /* f */ FP_REGS,  /* g **/ NO_REGS,     /* h */ NO_REGS,
-  /* i **/ NO_REGS,  /* j */ NO_REGS,  /* k */ SIBCALL_REGS, /* l */ PR_REGS,
-  /* m **/ NO_REGS,  /* n **/ NO_REGS, /* o **/ NO_REGS,     /* p **/ NO_REGS,
-  /* q */ NO_REGS,   /* r **/ NO_REGS, /* s **/ NO_REGS,     /* t */ T_REGS,
-  /* u */ NO_REGS,   /* v */ NO_REGS,  /* w */ FP0_REGS,     /* x */ MAC_REGS,
-  /* y */ FPUL_REGS, /* z */ R0_REGS
-};
-
 int assembler_dialect;
 
 static bool shmedia_space_reserved_for_target_registers;
@@ -1414,7 +1400,7 @@ prepare_cbranch_operands (rtx *operands, enum machine_mode mode,
 	  || (mode == SImode && operands[2] != CONST0_RTX (SImode)
 	      && ((comparison != EQ && comparison != NE)
 		  || (REG_P (op1) && REGNO (op1) != R0_REG)
-		  || !CONST_OK_FOR_I08 (INTVAL (operands[2]))))))
+		  || !satisfies_constraint_I08 (operands[2])))))
     {
       if (scratch && GET_MODE (scratch) == mode)
 	{
@@ -2281,9 +2267,8 @@ andcosts (rtx x)
 
   if (TARGET_SHMEDIA)
     {
-      if (GET_CODE (XEXP (x, 1)) == CONST_INT
-	  && (CONST_OK_FOR_I10 (INTVAL (XEXP (x, 1)))
-	      || CONST_OK_FOR_J16 (INTVAL (XEXP (x, 1)))))
+      if (satisfies_constraint_I10 (XEXP (x, 1))
+	  || satisfies_constraint_J16 (XEXP (x, 1)))
 	return 1;
       else
 	return 1 + rtx_cost (XEXP (x, 1), AND);
@@ -3719,10 +3704,8 @@ broken_move (rtx insn)
 		&& FP_REGISTER_P (REGNO (SET_DEST (pat))))
 	  && ! (TARGET_SH2A
 		&& GET_MODE (SET_DEST (pat)) == SImode
-		&& GET_CODE (SET_SRC (pat)) == CONST_INT
-		&& CONST_OK_FOR_I20 (INTVAL (SET_SRC (pat))))
-	  && (GET_CODE (SET_SRC (pat)) != CONST_INT
-	      || ! CONST_OK_FOR_I08 (INTVAL (SET_SRC (pat)))))
+		&& satisfies_constraint_I20 (SET_SRC (pat)))
+	  && ! satisfies_constraint_I08 (SET_SRC (pat)))
 	return 1;
     }
 
@@ -10930,7 +10913,7 @@ sh_secondary_reload (bool in_p, rtx x, enum reg_class class,
         return GENERAL_REGS;
       if (class == FPUL_REGS && immediate_operand (x, mode))
 	{
-	  if (GET_CODE (x) == CONST_INT && CONST_OK_FOR_I08 (INTVAL (x)))
+	  if (satisfies_constraint_I08 (x))
 	    return GENERAL_REGS;
 	  sri->icode = CODE_FOR_reload_insi__i_fpul;
 	  return NO_REGS;
@@ -10983,7 +10966,7 @@ sh_secondary_reload (bool in_p, rtx x, enum reg_class class,
     }
   if ((class == TARGET_REGS
        || (TARGET_SHMEDIA && class == SIBCALL_REGS))
-      && !EXTRA_CONSTRAINT_Csy (x)
+      && !satisfies_constraint_Csy (x)
       && (GET_CODE (x) != REG || ! GENERAL_REGISTER_P (REGNO (x))))
     return GENERAL_REGS;
   if ((class == MAC_REGS || class == PR_REGS)

gcc/config/sh/sh.md

@@ -457,6 +457,7 @@
 (include "sh4.md")
 
 (include "predicates.md")
+(include "constraints.md")
 
 ;; Definitions for filling delay slots
 
@@ -1219,7 +1220,7 @@
   "TARGET_PRETEND_CMOVE
    && (arith_reg_operand (operands[1], SImode)
        || (immediate_operand (operands[1], SImode)
-	   && CONST_OK_FOR_I08 (INTVAL (operands[1]))))"
+	   && satisfies_constraint_I08 (operands[1])))"
   "bt 0f\;mov %1,%0\\n0:"
   [(set_attr "type" "mt_group,arith") ;; poor approximation
    (set_attr "length" "4")])
@@ -1232,7 +1233,7 @@
   "TARGET_PRETEND_CMOVE
    && (arith_reg_operand (operands[1], SImode)
        || (immediate_operand (operands[1], SImode)
-	   && CONST_OK_FOR_I08 (INTVAL (operands[1]))))"
+	   && satisfies_constraint_I08 (operands[1])))"
   "bf 0f\;mov %1,%0\\n0:"
   [(set_attr "type" "mt_group,arith") ;; poor approximation
    (set_attr "length" "4")])
@@ -3547,8 +3548,7 @@ label:
 		   (match_operand:SI 2 "nonmemory_operand" "r,M,P27,?ri")))
    (clobber (match_scratch:SI 3 "=X,X,X,&r"))]
   "TARGET_SH3
-   || (TARGET_SH1 && GET_CODE (operands[2]) == CONST_INT
-       && CONST_OK_FOR_P27 (INTVAL (operands[2])))"
+   || (TARGET_SH1 && satisfies_constraint_P27 (operands[2]))"
   "@
    shld	%2,%0
    add	%0,%0
@@ -3557,7 +3557,7 @@ label:
   "TARGET_SH3
    && reload_completed
    && GET_CODE (operands[2]) == CONST_INT
-   && ! CONST_OK_FOR_P27 (INTVAL (operands[2]))"
+   && ! satisfies_constraint_P27 (operands[2])"
   [(set (match_dup 3) (match_dup 2))
    (parallel
     [(set (match_dup 0) (ashift:SI (match_dup 1) (match_dup 3)))
@@ -3570,7 +3570,7 @@ label:
   [(set (match_operand:HI 0 "arith_reg_dest" "=r,r")
 	(ashift:HI (match_operand:HI 1 "arith_reg_operand" "0,0")
 		   (match_operand:HI 2 "const_int_operand" "M,P27")))]
-  "TARGET_SH1 && CONST_OK_FOR_P27 (INTVAL (operands[2]))"
+  "TARGET_SH1 && satisfies_constraint_P27 (operands[2])"
   "@
 	add	%0,%0
 	shll%O2	%0"
@@ -3865,7 +3865,7 @@ label:
 	(lshiftrt:SI (match_operand:SI 1 "arith_reg_operand" "0")
 		     (match_operand:SI 2 "const_int_operand" "M")))
    (clobber (reg:SI T_REG))]
-  "TARGET_SH1 && CONST_OK_FOR_M (INTVAL (operands[2]))"
+  "TARGET_SH1 && satisfies_constraint_M (operands[2])"
   "shlr	%0"
   [(set_attr "type" "arith")])
 
@@ -3873,8 +3873,8 @@ label:
   [(set (match_operand:SI 0 "arith_reg_dest" "=r")
 	(lshiftrt:SI (match_operand:SI 1 "arith_reg_operand" "0")
 		     (match_operand:SI 2 "const_int_operand" "P27")))]
-  "TARGET_SH1 && CONST_OK_FOR_P27 (INTVAL (operands[2]))
-   && ! CONST_OK_FOR_M (INTVAL (operands[2]))"
+  "TARGET_SH1 && satisfies_constraint_P27 (operands[2])
+   && ! satisfies_constraint_M (operands[2])"
   "shlr%O2	%0"
   [(set_attr "type" "arith")])
 
@@ -5154,7 +5154,7 @@ label:
 	(match_operand:SI 1 "immediate_operand" ""))]
   "TARGET_SHMEDIA && reload_completed
    && ((GET_CODE (operands[1]) == CONST_INT
-	&& ! CONST_OK_FOR_I16 (INTVAL (operands[1])))
+	&& ! satisfies_constraint_I16 (operands[1]))
        || GET_CODE (operands[1]) == CONST_DOUBLE)"
   [(set (subreg:DI (match_dup 0) 0) (match_dup 1))])
 
@@ -5366,7 +5366,7 @@ label:
   [(set (match_operand:HI 0 "register_operand" "")
 	(match_operand:HI 1 "immediate_operand" ""))]
   "TARGET_SHMEDIA && reload_completed
-   && ! CONST_OK_FOR_I16 (INTVAL (operands[1]))"
+   && ! satisfies_constraint_I16 (operands[1])"
   [(set (subreg:DI (match_dup 0) 0) (match_dup 1))])
 
 (define_expand "movhi"
@@ -5602,7 +5602,7 @@ label:
 	(match_operand:DI 1 "immediate_operand" ""))]
   "TARGET_SHMEDIA && reload_completed
    && GET_CODE (operands[1]) == CONST_INT
-   && ! CONST_OK_FOR_I16 (INTVAL (operands[1]))"
+   && ! satisfies_constraint_I16 (operands[1])"
   [(set (match_dup 0) (match_dup 2))
    (match_dup 1)]
   "
@@ -6981,8 +6981,7 @@ label:
 
       sh_compare_op0 = force_reg (mode, sh_compare_op0);
       if (CONSTANT_P (sh_compare_op1)
-	  && (GET_CODE (sh_compare_op1) != CONST_INT
-	      || ! CONST_OK_FOR_I06 (INTVAL (sh_compare_op1))))
+	  && (! satisfies_constraint_I06 (sh_compare_op1)))
 	sh_compare_op1 = force_reg (mode, sh_compare_op1);
       emit_jump_insn (gen_beq_media (operands[0],
 				     sh_compare_op0, sh_compare_op1));
@@ -7015,8 +7014,7 @@ label:
 
       sh_compare_op0 = force_reg (mode, sh_compare_op0);
       if (CONSTANT_P (sh_compare_op1)
-	  && (GET_CODE (sh_compare_op1) != CONST_INT
-	      || ! CONST_OK_FOR_I06 (INTVAL (sh_compare_op1))))
+	  && (! satisfies_constraint_I06 (sh_compare_op1)))
 	sh_compare_op1 = force_reg (mode, sh_compare_op1);
       emit_jump_insn (gen_bne_media (operands[0],
 				     sh_compare_op0, sh_compare_op1));
@@ -8411,7 +8409,7 @@ label:
 	(const (unspec [(match_operand 1 "" "Csy")]
 			     UNSPEC_DATALABEL)))]
   "TARGET_SHMEDIA && flag_pic
-   && EXTRA_CONSTRAINT_Csy (operands[1])"
+   && satisfies_constraint_Csy (operands[1])"
   "ptb/u	datalabel %1, %0"
   [(set_attr "type" "ptabs_media")
    (set_attr "length" "*")])